AU530661B2 – Clock recovery circuit for burst communications systems
– Google Patents
AU530661B2 – Clock recovery circuit for burst communications systems
– Google Patents
Clock recovery circuit for burst communications systems
Info
Publication number
AU530661B2
AU530661B2
AU61954/80A
AU6195480A
AU530661B2
AU 530661 B2
AU530661 B2
AU 530661B2
AU 61954/80 A
AU61954/80 A
AU 61954/80A
AU 6195480 A
AU6195480 A
AU 6195480A
AU 530661 B2
AU530661 B2
AU 530661B2
Authority
AU
Australia
Prior art keywords
communications systems
recovery circuit
clock recovery
burst communications
burst
Prior art date
1979-09-03
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU61954/80A
Other versions
AU6195480A
(en
Inventor
Masaharu Hata
Kotaro Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Docomo Inc
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1979-09-03
Filing date
1980-09-02
Publication date
1983-07-21
1980-09-02
Application filed by Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd
filed
Critical
Nippon Telegraph and Telephone Corp
1981-03-12
Publication of AU6195480A
publication
Critical
patent/AU6195480A/en
1983-07-21
Application granted
granted
Critical
1983-07-21
Publication of AU530661B2
publication
Critical
patent/AU530661B2/en
1996-05-02
Assigned to NEC CORPORATION, NIPPON TELEGRAPH & TELEPHONE CORPORATION, NTT MOBILE COMMUNICATIONS NETWORK, INC.
reassignment
NEC CORPORATION
Alteration of Name(s) in Register under S187
Assignors: NIPPON ELECTRIC CO. LTD., NIPPON TELEGRAPH & TELEPHONE CORPORATION
2000-09-02
Anticipated expiration
legal-status
Critical
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
AU61954/80A
1979-09-03
1980-09-02
Clock recovery circuit for burst communications systems
Expired
AU530661B2
(en)
Applications Claiming Priority (2)
Application Number
Priority Date
Filing Date
Title
JP54112544A
JPS594900B2
(en)
1979-09-03
1979-09-03
clock recovery circuit
JP11254479
1979-09-03
Publications (2)
Publication Number
Publication Date
AU6195480A
AU6195480A
(en)
1981-03-12
AU530661B2
true
AU530661B2
(en)
1983-07-21
Family
ID=14589298
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
AU61954/80A
Expired
AU530661B2
(en)
1979-09-03
1980-09-02
Clock recovery circuit for burst communications systems
Country Status (6)
Country
Link
US
(1)
US4339817A
(en)
EP
(1)
EP0025217B1
(en)
JP
(1)
JPS594900B2
(en)
AU
(1)
AU530661B2
(en)
CA
(1)
CA1146648A
(en)
DE
(1)
DE3067273D1
(en)
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU601222B2
(en)
*
1986-09-30
1990-09-06
Siemens Aktiengesellschaft
Apparatus for generating a clock signal
AU610783B1
(en)
*
1989-09-27
1991-05-23
Siemens Aktiengesellschaft
Clock supply for multiplex systems
AU623458B2
(en)
*
1988-12-19
1992-05-14
Alcatel N.V.
Jitter reduction circuit in a demultiplexer
Families Citing this family (21)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
FR2515902B1
(en)
*
1981-11-03
1985-12-06
Telecommunications Sa
DIGITAL CLOCK SYNCHRONIZATION DEVICE AND ITS APPLICATION TO CONNECTION NETWORKS
SE430456B
(en)
*
1982-03-10
1983-11-14
Ericsson Telefon Ab L M
SET AND DEVICE FOR PHASE SYNCHRONIZING A BROADCASTING STATION IN A DIGITAL TELECOMMUNICATION NETWORK
JPS58204651A
(en)
*
1982-05-24
1983-11-29
Nec Corp
Clock regenerating circuit
SE433282B
(en)
*
1982-09-20
1984-05-14
Ellemtel Utvecklings Ab
synchronization system
JPS60109345A
(en)
*
1983-11-18
1985-06-14
Nippon Telegr & Teleph Corp
Clock synchronizing system
US4530091A
(en)
*
1983-07-08
1985-07-16
At&T Bell Laboratories
Synchronization of real-time clocks in a packet switching system
JPH0728277B2
(en)
*
1984-03-02
1995-03-29
日本電信電話株式会社
Bit synchronization circuit
JPS60216647A
(en)
*
1984-04-12
1985-10-30
Toshiba Corp
Jitter elimination synchronizing equipment
JPS61184014A
(en)
*
1985-02-08
1986-08-16
Nec Corp
System and apparatus of initial connection in time division multiple access communciation
JPS61189042A
(en)
*
1985-02-15
1986-08-22
Nec Corp
Synchronizing device for clock phase
US4807254A
(en)
*
1985-08-09
1989-02-21
Nec Corporation
Carrier wave recovery system
JPH0614639B2
(en)
*
1985-08-26
1994-02-23
株式会社日立製作所
Synchronous retractor
JP2507310B2
(en)
*
1985-12-10
1996-06-12
株式会社東芝
Clock reproduction circuit
JPS62196921A
(en)
*
1986-02-25
1987-08-31
Nec Corp
Phase detecting circuit
US6285722B1
(en)
1997-12-05
2001-09-04
Telcordia Technologies, Inc.
Method and apparatus for variable bit rate clock recovery
JP3573661B2
(en)
*
1999-06-24
2004-10-06
Ｎｅｃエレクトロニクス株式会社
Clock signal control method and circuit and data transmission device using the same
US7161998B2
(en)
*
2001-01-24
2007-01-09
Broadcom Corporation
Digital phase locked loop for regenerating the clock of an embedded signal
EP1294122B1
(en)
*
2001-09-14
2004-04-28
Alcatel
Circuit for a single burst receiver
US6917658B2
(en)
*
2002-09-16
2005-07-12
Silicon Labs Cp, Inc.
Clock recovery method for bursty communications
US7385990B2
(en)
*
2003-07-21
2008-06-10
Zarlink Semiconductor Inc.
Method to improve the resolution of time measurements and alignment in packet networks by time modulation
JP4916108B2
(en)
*
2004-12-03
2012-04-11
永大産業株式会社
Leg support member
Family Cites Families (10)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
NL7000939A
(en)
*
1970-01-23
1970-03-23
Philips Nv
US3671876A
(en)
*
1971-01-19
1972-06-20
George S Oshiro
Pulse-phase comparators
DE2139404C3
(en)
*
1971-08-06
1980-12-04
Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt
Procedure for synchronization
DE2163971C3
(en)
*
1971-12-22
1979-07-12
Siemens Ag, 1000 Berlin Und 8000 Muenchen
Circuit for digital frequency setting of an oscillator
JPS5127014A
(en)
*
1974-08-30
1976-03-06
Fujitsu Ltd
Hidokisetsuzokuhoshiki
US3940558A
(en)
*
1975-01-31
1976-02-24
Digital Communications Corporation
Remote master/slave station clock
GB1580060A
(en)
*
1976-09-01
1980-11-26
Racal Res Ltd
Electrical circuit arrangements
GB1585080A
(en)
*
1976-11-06
1981-02-25
Marconi Co Ltd
Circuit for producing synchronisation pulses
DE2735053C3
(en)
*
1977-08-03
1980-05-22
Siemens Ag, 1000 Berlin Und 8000 Muenchen
Digital phase locked loop
US4231114A
(en)
*
1978-02-27
1980-10-28
Motorola, Inc.
Synchronizing means for a two-way communication system
1979
1979-09-03
JP
JP54112544A
patent/JPS594900B2/en
not_active
Expired
1980
1980-09-02
US
US06/183,333
patent/US4339817A/en
not_active
Expired – Lifetime
1980-09-02
AU
AU61954/80A
patent/AU530661B2/en
not_active
Expired
1980-09-02
CA
CA000359430A
patent/CA1146648A/en
not_active
Expired
1980-09-03
EP
EP80105254A
patent/EP0025217B1/en
not_active
Expired
1980-09-03
DE
DE8080105254T
patent/DE3067273D1/en
not_active
Expired
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU601222B2
(en)
*
1986-09-30
1990-09-06
Siemens Aktiengesellschaft
Apparatus for generating a clock signal
AU623458B2
(en)
*
1988-12-19
1992-05-14
Alcatel N.V.
Jitter reduction circuit in a demultiplexer
AU610783B1
(en)
*
1989-09-27
1991-05-23
Siemens Aktiengesellschaft
Clock supply for multiplex systems
Also Published As
Publication number
Publication date
EP0025217B1
(en)
1984-03-28
CA1146648A
(en)
1983-05-17
US4339817A
(en)
1982-07-13
JPS594900B2
(en)
1984-02-01
AU6195480A
(en)
1981-03-12
JPS5636249A
(en)
1981-04-09
EP0025217A1
(en)
1981-03-18
DE3067273D1
(en)
1984-05-03
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Legal Events
Date
Code
Title
Description
2001-04-05
MK14
Patent ceased section 143(a) (annual fees not paid) or expired
