GB1135554A – Improvements in or relating to computer priority circuits
– Google Patents
GB1135554A – Improvements in or relating to computer priority circuits
– Google Patents
Improvements in or relating to computer priority circuits
Info
Publication number
GB1135554A
GB1135554A
GB1655/66A
GB165566A
GB1135554A
GB 1135554 A
GB1135554 A
GB 1135554A
GB 1655/66 A
GB1655/66 A
GB 1655/66A
GB 165566 A
GB165566 A
GB 165566A
GB 1135554 A
GB1135554 A
GB 1135554A
Authority
GB
United Kingdom
Prior art keywords
programme
group
priority
request
signals
Prior art date
1965-01-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1655/66A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Electronics UK Ltd
Original Assignee
Philips Electronic and Associated Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1965-01-16
Filing date
1966-01-13
Publication date
1968-12-04
1966-01-13
Application filed by Philips Electronic and Associated Industries Ltd
filed
Critical
Philips Electronic and Associated Industries Ltd
1968-12-04
Publication of GB1135554A
publication
Critical
patent/GB1135554A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F9/00—Arrangements for program control, e.g. control units
G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
G06F9/46—Multiprogramming arrangements
G06F9/48—Program initiating; Program switching, e.g. by interrupt
G06F9/4806—Task transfer initiation or dispatching
G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F9/00—Arrangements for program control, e.g. control units
G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
G06F9/46—Multiprogramming arrangements
G06F9/48—Program initiating; Program switching, e.g. by interrupt
G06F9/4806—Task transfer initiation or dispatching
G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
G06F9/4818—Priority circuits therefor
Abstract
1,135,554. Multi-programme priority arrangemerit. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 13 Jan., 1966 [16 Jan., 1965], No. 1655/66. Heading G4A. A priority control arrangement is described for storing randomly occurring requests for the execution of different programmes arranged in groups and for controlling their execution according to a system of priorities. Thus a request for a programme in a higher priority group may interrupt a programme in a lower priority group (strong priority) and a request for a programme in a group in which a programme is already being executed may take precedence over lower priority programmes in the same group only after the current programme is completed (weak priority) or the programmes within a group may have no priority over one another but may merely be taken in cyclical order. As shown schematically in Fig. 3, the arrangement comprises a plurality of request registers A, B, C and D (shown in detail in Fig. 4) a group register Gr (described in detail with reference to Figs. 6-8, not shown) and an address generator Adr. Gen. Each of the request registers A-D has inputs (B 1 -B 4 ) for receiving request signals for the respective programmes and comprises flip-flops (FF 1 – FF 4 ) for storing these requests, a cyclically operating counter TS for scanning the flip-flops in turn to establish which is set and a status flip-flop for indicating (when set) that a programme in that group has been started. The group register Gr, by means of signals from those flip-flops in registers A-D which have been set and by means of signals a and b from the computer which indicate respectively the ending of an instruction and the ending of a programme, performs a book-keeping operation and issues programme start and cancel signals to the registers A-D and programme interrupt signals to the address generator. The address generator, on receiving an interrupt signal, stores the address of the next instruction in the current programme (one store per group being provided) and then passes control through group register Gr to the register A-C corresponding to the request for a programme of higher priority. The invention is said to have applications in signal (e.g. telegram) handling centres.
GB1655/66A
1965-01-16
1966-01-13
Improvements in or relating to computer priority circuits
Expired
GB1135554A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
NL6500562A
NL6500562A
(en)
1965-01-16
1965-01-16
Publications (1)
Publication Number
Publication Date
GB1135554A
true
GB1135554A
(en)
1968-12-04
Family
ID=19792129
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB1655/66A
Expired
GB1135554A
(en)
1965-01-16
1966-01-13
Improvements in or relating to computer priority circuits
Country Status (9)
Country
Link
US
(1)
US3491339A
(en)
AT
(1)
AT260580B
(en)
BE
(1)
BE675164A
(en)
CH
(1)
CH451566A
(en)
DE
(1)
DE1524198A1
(en)
DK
(1)
DK114868B
(en)
GB
(1)
GB1135554A
(en)
NL
(1)
NL6500562A
(en)
SE
(1)
SE318431B
(en)
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2167583A
(en)
*
1984-11-23
1986-05-29
Nat Res Dev
Apparatus and methods for processing an array items of data
Families Citing this family (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3648253A
(en)
*
1969-12-10
1972-03-07
Ibm
Program scheduler for processing systems
US3774163A
(en)
*
1972-04-05
1973-11-20
Co Int Pour L Inf
Hierarchized priority task chaining apparatus in information processing systems
US4044333A
(en)
*
1972-07-26
1977-08-23
Siemens Aktiengesellschaft
Data processing switching system
US4564901A
(en)
*
1983-07-21
1986-01-14
Burroughs Corporation
Method of performing a sequence of related activities via multiple asynchronously intercoupled digital processors
GB2302743B
(en)
*
1995-06-26
2000-02-16
Sony Uk Ltd
Processing apparatus
US5794306A
(en)
*
1996-06-03
1998-08-18
Mid Products, Inc.
Yard care machine vacuum head
US11792135B2
(en)
2022-03-07
2023-10-17
Bank Of America Corporation
Automated process scheduling in a computer network
Family Cites Families (10)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
NL233967A
(en)
*
1957-12-09
NL229160A
(en)
*
1958-06-30
US3029414A
(en)
*
1958-08-11
1962-04-10
Honeywell Regulator Co
Information handling apparatus
NL248274A
(en)
*
1959-02-16
GB986103A
(en)
*
1960-06-30
1965-03-17
Nat Res Dev
Improvements in or relating to electronic digital computing machines
US3225334A
(en)
*
1960-11-07
1965-12-21
Gen Electric
Data processing system including plural peripheral devices with means for the selection and operation
US3221309A
(en)
*
1961-08-10
1965-11-30
Scam Instr Corp
Priority interrupt monitoring system
BE634161A
(en)
*
1962-07-03
US3309672A
(en)
*
1963-01-04
1967-03-14
Sylvania Electric Prod
Electronic computer interrupt system
US3331055A
(en)
*
1964-06-01
1967-07-11
Sperry Rand Corp
Data communication system with matrix selection of line terminals
1965
1965-01-16
NL
NL6500562A
patent/NL6500562A/xx
unknown
1966
1966-01-12
DE
DE19661524198
patent/DE1524198A1/en
active
Pending
1966-01-13
AT
AT30266A
patent/AT260580B/en
active
1966-01-13
GB
GB1655/66A
patent/GB1135554A/en
not_active
Expired
1966-01-13
SE
SE464/66A
patent/SE318431B/xx
unknown
1966-01-13
DK
DK18366AA
patent/DK114868B/en
unknown
1966-01-13
CH
CH41466A
patent/CH451566A/en
unknown
1966-01-14
BE
BE675164D
patent/BE675164A/xx
unknown
1966-01-17
US
US520971A
patent/US3491339A/en
not_active
Expired – Lifetime
Cited By (2)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2167583A
(en)
*
1984-11-23
1986-05-29
Nat Res Dev
Apparatus and methods for processing an array items of data
US4799154A
(en)
*
1984-11-23
1989-01-17
National Research Development Corporation
Array processor apparatus
Also Published As
Publication number
Publication date
SE318431B
(en)
1969-12-08
BE675164A
(en)
1966-07-14
DE1524198A1
(en)
1970-07-02
CH451566A
(en)
1968-05-15
DK114868B
(en)
1969-08-11
US3491339A
(en)
1970-01-20
NL6500562A
(en)
1966-07-18
AT260580B
(en)
1968-03-11
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