GB1360401A – Memory system including buffer memories
– Google Patents
GB1360401A – Memory system including buffer memories
– Google Patents
Memory system including buffer memories
Info
Publication number
GB1360401A
GB1360401A
GB4963871A
GB4963871A
GB1360401A
GB 1360401 A
GB1360401 A
GB 1360401A
GB 4963871 A
GB4963871 A
GB 4963871A
GB 4963871 A
GB4963871 A
GB 4963871A
GB 1360401 A
GB1360401 A
GB 1360401A
Authority
GB
United Kingdom
Prior art keywords
bits
memory
block
tag
buffers
Prior art date
1970-10-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4963871A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1970-10-29
Filing date
1971-10-26
Publication date
1974-07-17
1971-10-26
Application filed by RCA Corp
filed
Critical
RCA Corp
1974-07-17
Publication of GB1360401A
publication
Critical
patent/GB1360401A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F12/00—Accessing, addressing or allocating within memory systems or architectures
G06F12/02—Addressing or allocation; Relocation
G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
Abstract
1360401 Memory systems RCO CORPORATION 26 Oct 1971 [29 Oct 1970] 49638/71 Heading G4A A main memory M, storing information blocks at locations addressed by set and tag bits, has at least one buffer memory Bx, Byforstoring information blocks and associated tag bits at locations addressed by the set bits, and a further memory Z for storing information blocks and associated tag and set bits transferred thereto from a buffer memory location and the address register. If a block specified by the set and tag bits in AR is not in any of memories X, Y, Z, signals x, y, z cause these bits to address the slow access main memory, the block read out being sent to a processor via gate 12 and into one or other of buffers X, Y, determined by selector 22, at a location determined by the set bits. Selector 22 preferably is arranged to select the buffers so that the new block replaces that one of the two previous blocks of the same set which has been longer in the buffers or was less recently accessed. The replaced block and its associated set and tag bits are entered into memory Z which may be of the content-addressed type, and is preferably organized so that, when full, an information block with its set and tag bits transferred thereto replaces the contents of the least recently or least frequently accessed location. Whenever a block specified by AR is found in buffer X or Y or memory Z, the block is transferred directly via gate 12 to the processor.
GB4963871A
1970-10-29
1971-10-26
Memory system including buffer memories
Expired
GB1360401A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
US8519070A
1970-10-29
1970-10-29
Publications (1)
Publication Number
Publication Date
GB1360401A
true
GB1360401A
(en)
1974-07-17
Family
ID=22190037
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB4963871A
Expired
GB1360401A
(en)
1970-10-29
1971-10-26
Memory system including buffer memories
Country Status (7)
Country
Link
US
(1)
US3699533A
(en)
JP
(1)
JPS5040970B1
(en)
CA
(1)
CA948787A
(en)
DE
(1)
DE2154106C3
(en)
FR
(1)
FR2131247A5
(en)
GB
(1)
GB1360401A
(en)
NL
(1)
NL7114857A
(en)
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2260628A
(en)
*
1991-10-11
1993-04-21
Intel Corp
Line buffer for cache memory
Families Citing this family (41)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3806705A
(en)
*
1972-06-19
1974-04-23
R Reilly
Data logging and organizing machine
US3800286A
(en)
*
1972-08-24
1974-03-26
Honeywell Inf Systems
Address development technique utilizing a content addressable memory
US3781808A
(en)
*
1972-10-17
1973-12-25
Ibm
Virtual memory system
US3806888A
(en)
*
1972-12-04
1974-04-23
Ibm
Hierarchial memory system
US3848234A
(en)
*
1973-04-04
1974-11-12
Sperry Rand Corp
Multi-processor system with multiple cache memories
US3840863A
(en)
*
1973-10-23
1974-10-08
Ibm
Dynamic storage hierarchy system
FR122199A
(en)
*
1973-12-17
US3896419A
(en)
*
1974-01-17
1975-07-22
Honeywell Inf Systems
Cache memory store in a processor of a data processing system
US3984812A
(en)
*
1974-04-15
1976-10-05
Burroughs Corporation
Computer memory read delay
NL7510904A
(en)
*
1975-09-17
1977-03-21
Philips Nv
WORD GROUP PRIORITY DEVELOPMENT.
DE2543589C2
(en)
*
1975-09-30
1982-11-04
Siemens AG, 1000 Berlin und 8000 München
Hierarchically structured, multi-level storage system and process for its operation
US4035778A
(en)
*
1975-11-17
1977-07-12
International Business Machines Corporation
Apparatus for assigning space in a working memory as a function of the history of usage
US4008460A
(en)
*
1975-12-24
1977-02-15
International Business Machines Corporation
Circuit for implementing a modified LRU replacement algorithm for a cache
US4050094A
(en)
*
1976-04-30
1977-09-20
International Business Machines Corporation
Translator lookahead controls
US4149242A
(en)
*
1977-05-06
1979-04-10
Bell Telephone Laboratories, Incorporated
Data interface apparatus for multiple sequential processors
US4156906A
(en)
*
1977-11-22
1979-05-29
Honeywell Information Systems Inc.
Buffer store including control apparatus which facilitates the concurrent processing of a plurality of commands
US4257097A
(en)
*
1978-12-11
1981-03-17
Bell Telephone Laboratories, Incorporated
Multiprocessor system with demand assignable program paging stores
US4312036A
(en)
*
1978-12-11
1982-01-19
Honeywell Information Systems Inc.
Instruction buffer apparatus of a cache unit
US4276609A
(en)
*
1979-01-04
1981-06-30
Ncr Corporation
CCD memory retrieval system
JPS55157181A
(en)
*
1979-05-25
1980-12-06
Nec Corp
Buffer memory control system
USRE36989E
(en)
*
1979-10-18
2000-12-12
Storage Technology Corporation
Virtual storage system and method
JPS5687282A
(en)
*
1979-12-14
1981-07-15
Nec Corp
Data processor
JPS61210477A
(en)
*
1984-05-25
1986-09-18
Hitachi Ltd
Vector type association memory system
JPS619676U
(en)
*
1984-06-25
1986-01-21
三菱電機株式会社
Sealing device for shaft penetration part
EP0174556B1
(en)
*
1984-09-12
1990-05-23
BBC Brown Boveri AG
Method for searching memory addresses, and address comparing circuit
US4805093A
(en)
*
1986-10-14
1989-02-14
Ward Calvin B
Content addressable memory
GB8728494D0
(en)
*
1987-12-05
1988-01-13
Int Computers Ltd
Multi-cache data storage system
JPH0348951A
(en)
*
1989-07-18
1991-03-01
Fujitsu Ltd
Address monitor device
WO1994003856A1
(en)
*
1992-08-07
1994-02-17
Massachusetts Institute Of Technology
Column-associative cache
US5623627A
(en)
*
1993-12-09
1997-04-22
Advanced Micro Devices, Inc.
Computer memory architecture including a replacement cache
US5778427A
(en)
*
1995-07-07
1998-07-07
Sun Microsystems, Inc.
Method and apparatus for selecting a way of a multi-way associative cache by storing waylets in a translation structure
US5761713A
(en)
*
1996-03-01
1998-06-02
Hewlett-Packard Co.
Address aggregation system and method for increasing throughput to a multi-banked data cache from a processor by concurrently forwarding an address to each bank
US6658526B2
(en)
1997-03-12
2003-12-02
Storage Technology Corporation
Network attached virtual data storage subsystem
EP1008051A4
(en)
1997-03-12
2007-04-25
Storage Technology Corp
Network attached virtual tape data storage subsystem
US6094605A
(en)
*
1998-07-06
2000-07-25
Storage Technology Corporation
Virtual automated cartridge system
US6330621B1
(en)
1999-01-15
2001-12-11
Storage Technology Corporation
Intelligent data storage manager
US6834324B1
(en)
2000-04-10
2004-12-21
Storage Technology Corporation
System and method for virtual tape volumes
US20030126132A1
(en)
*
2001-12-27
2003-07-03
Kavuri Ravi K.
Virtual volume management system and method
US7010649B2
(en)
*
2003-10-14
2006-03-07
International Business Machines Corporation
Performance of a cache by including a tag that stores an indication of a previously requested address by the processor not stored in the cache
US7952489B1
(en)
2008-01-31
2011-05-31
Rising Phoenix Industries Incorporated
Vehicle communication system and method of use
JP4650552B2
(en)
*
2008-10-14
2011-03-16
ソニー株式会社
Electronic device, content recommendation method and program
Family Cites Families (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3339183A
(en)
*
1964-11-16
1967-08-29
Burroughs Corp
Copy memory for a digital processor
US3387283A
(en)
*
1966-02-07
1968-06-04
Ibm
Addressing system
US3462744A
(en)
*
1966-09-28
1969-08-19
Ibm
Execution unit with a common operand and resulting bussing system
GB1218406A
(en)
*
1968-07-04
1971-01-06
Ibm
An electronic data processing system
1970
1970-10-29
US
US85190A
patent/US3699533A/en
not_active
Expired – Lifetime
1971
1971-09-17
CA
CA123,154A
patent/CA948787A/en
not_active
Expired
1971-10-26
GB
GB4963871A
patent/GB1360401A/en
not_active
Expired
1971-10-28
JP
JP46085888A
patent/JPS5040970B1/ja
active
Pending
1971-10-28
NL
NL7114857A
patent/NL7114857A/xx
not_active
Application Discontinuation
1971-10-29
FR
FR7139094A
patent/FR2131247A5/fr
not_active
Expired
1971-10-29
DE
DE2154106A
patent/DE2154106C3/en
not_active
Expired
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2260628A
(en)
*
1991-10-11
1993-04-21
Intel Corp
Line buffer for cache memory
Also Published As
Publication number
Publication date
DE2154106B2
(en)
1975-05-22
DE2154106C3
(en)
1976-01-08
JPS5040970B1
(en)
1975-12-27
NL7114857A
(en)
1972-05-03
US3699533A
(en)
1972-10-17
FR2131247A5
(en)
1972-11-10
DE2154106A1
(en)
1972-05-04
CA948787A
(en)
1974-06-04
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Legal Events
Date
Code
Title
Description
1974-11-27
PS
Patent sealed [section 19, patents act 1949]
1984-07-04
PCNP
Patent ceased through non-payment of renewal fee
