GB1441510A

GB1441510A – Devices comprising josephson tunnelling junctions
– Google Patents

GB1441510A – Devices comprising josephson tunnelling junctions
– Google Patents
Devices comprising josephson tunnelling junctions

Info

Publication number
GB1441510A

GB1441510A
GB4497174A
GB4497174A
GB1441510A
GB 1441510 A
GB1441510 A
GB 1441510A
GB 4497174 A
GB4497174 A
GB 4497174A
GB 4497174 A
GB4497174 A
GB 4497174A
GB 1441510 A
GB1441510 A
GB 1441510A
Authority
GB
United Kingdom
Prior art keywords
junction
extension
electrodes
current
superconducting
Prior art date
1973-10-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB4497174A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-10-30
Filing date
1974-10-17
Publication date
1976-07-07

1974-10-17
Application filed by International Business Machines Corp
filed
Critical
International Business Machines Corp

1976-07-07
Publication of GB1441510A
publication
Critical
patent/GB1441510A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

H—ELECTRICITY

H03—ELECTRONIC CIRCUITRY

H03K—PULSE TECHNIQUE

H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components

H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices

H03K19/1952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with electro-magnetic coupling of the control current

H—ELECTRICITY

H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

H10N60/00—Superconducting devices

H10N60/10—Junction-based devices

H10N60/12—Josephson-effect devices

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S505/00—Superconductor technology: apparatus, material, process

Y10S505/825—Apparatus per se, device per se, or process of making or operating same

Y10S505/873—Active solid-state device

Y10S505/874—Active solid-state device with josephson junction, e.g. squid

Abstract

1441510 Superconductive devices INTERNATIONAL BUSINESS MACHINES CORP 17 Oct 1974 [30 Oct 1973] 44971/74 Heading H1K In a Josephson tunnelling junction having a plurality of control conductors and functioning as a logic gate, the junction electrodes are so constructed as to overcome the normal non- linear distribution of tunnelling current, this effect arising from the screening circulating current through the junction and its electrodes produced as an outcome of control conductor energization. With such a linear tunnelling current distribution each control conductor then produces the same effect on the logic gate for given operating conditions. In each of the arrangements described a superconducting ground plane is used although not illustrated. In a basic arrangement, Figs. 8 and 9, a tunnelling barrier 36 is provided between two rectangular superconducting electrodes 28, 30, each electrode being integral with a superconducting extension of lesser width. To provide the required linearity of junction current distribution, each rectangular electrode M2, M3 has a length l 1 , l 2 to the junction at least equal to the distance W1, W2 or W3, W4 at the root of the respective extension. In a modification a side entry extension is provided, Fig. 10, the conditions in this case being that l 1 is at least equal to W5. In an alternative arrangement, Fig. 12, electrode M3 is extended from the junction over the electrode M2 with an intermediate insulating layer I2, the extension length l e being at least equal to the junction width. A modification, Fig. 13, which uses two control electrodes 114, 116 has the extension provided in the form of a separate superconducting layer 118. Three control electrodes M4 are provided in Fig. 14 in which an extension superconducting layer is provided by overlap of M2 and M3. The Specification describes the effect of the circulating screening current and how this is overcome in detail, Figs. 1 to 7 (not shown), this current under normal conditions being concentrated along a restricted path on a superconductive surface below an energized control conductor but being distributed uniformly on the opposite surface.

GB4497174A
1973-10-30
1974-10-17
Devices comprising josephson tunnelling junctions

Expired

GB1441510A
(en)

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

US00411123A

US3848259A
(en)

1973-10-30
1973-10-30
Multicontrol logic gate design

Publications (1)

Publication Number
Publication Date

GB1441510A
true

GB1441510A
(en)

1976-07-07

Family
ID=23627660
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB4497174A
Expired

GB1441510A
(en)

1973-10-30
1974-10-17
Devices comprising josephson tunnelling junctions

Country Status (8)

Country
Link

US
(1)

US3848259A
(en)

JP
(1)

JPS5622388B2
(en)

CA
(1)

CA1023871A
(en)

DE
(1)

DE2448050C2
(en)

FR
(1)

FR2249449B1
(en)

GB
(1)

GB1441510A
(en)

IT
(1)

IT1020149B
(en)

NL
(1)

NL7414137A
(en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

CH624515A5
(en)

*

1976-09-09
1981-07-31
Mikhail Jurievich Kupriyanov

DE2848579C2
(en)

*

1977-11-25
1984-02-02
Petr Efimovič Kandyba

Layer cryotron

JPS57181887U
(en)

*

1981-05-15
1982-11-18

JPS5826102A
(en)

*

1981-08-07
1983-02-16
株式会社明電舎
Self-running type cutting machine

US5233244A
(en)

*

1991-03-25
1993-08-03
Fujitsu Limited
Josephson logic gate having a plurality of input ports and a josephson logic circuit that uses such a josephson logic gate

Family Cites Families (5)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3522492A
(en)

*

1967-10-23
1970-08-04
Texas Instruments Inc
Superconductive barrier devices

US3521133A
(en)

*

1967-11-24
1970-07-21
Ibm
Superconductive tunneling gate

GB1360100A
(en)

*

1970-12-31
1974-07-17
Ibm
Superconductive tunnelling device

US3764863A
(en)

*

1971-06-30
1973-10-09
Ibm
High gain josephson device

US3803459A
(en)

*

1971-10-27
1974-04-09
Gen Instrument Corp
Gain in a josephson junction

1973

1973-10-30
US
US00411123A
patent/US3848259A/en
not_active
Expired – Lifetime

1974

1974-07-25
FR
FR7426336A
patent/FR2249449B1/fr
not_active
Expired

1974-08-23
IT
IT26549/74A
patent/IT1020149B/en
active

1974-09-19
CA
CA209,646A
patent/CA1023871A/en
not_active
Expired

1974-10-09
DE
DE2448050A
patent/DE2448050C2/en
not_active
Expired

1974-10-16
JP
JP11832074A
patent/JPS5622388B2/ja
not_active
Expired

1974-10-17
GB
GB4497174A
patent/GB1441510A/en
not_active
Expired

1974-10-29
NL
NL7414137A
patent/NL7414137A/en
not_active
Application Discontinuation

Also Published As

Publication number
Publication date

US3848259A
(en)

1974-11-12

FR2249449A1
(en)

1975-05-23

DE2448050A1
(en)

1975-05-07

FR2249449B1
(en)

1976-10-22

NL7414137A
(en)

1975-05-02

CA1023871A
(en)

1978-01-03

DE2448050C2
(en)

1984-11-08

JPS5075792A
(en)

1975-06-21

JPS5622388B2
(en)

1981-05-25

IT1020149B
(en)

1977-12-20

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Legal Events

Date
Code
Title
Description

1976-11-17
PS
Patent sealed [section 19, patents act 1949]

1987-06-03
PCNP
Patent ceased through non-payment of renewal fee

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