GB1487748A – Signal composing circuits
– Google Patents
GB1487748A – Signal composing circuits
– Google Patents
Signal composing circuits
Info
Publication number
GB1487748A
GB1487748A
GB41570/74A
GB4157074A
GB1487748A
GB 1487748 A
GB1487748 A
GB 1487748A
GB 41570/74 A
GB41570/74 A
GB 41570/74A
GB 4157074 A
GB4157074 A
GB 4157074A
GB 1487748 A
GB1487748 A
GB 1487748A
Authority
GB
United Kingdom
Prior art keywords
circuit
signals
signal
output
transistors
Prior art date
1973-09-26
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB41570/74A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sansui Electric Co Ltd
Hitachi Ltd
Original Assignee
Sansui Electric Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-09-26
Filing date
1974-09-24
Publication date
1977-10-05
1973-09-26
Priority claimed from JP10819973A
external-priority
patent/JPS532721B2/ja
1974-05-08
Priority claimed from JP5028974A
external-priority
patent/JPS569840B2/ja
1974-09-24
Application filed by Sansui Electric Co Ltd, Hitachi Ltd
filed
Critical
Sansui Electric Co Ltd
1977-10-05
Publication of GB1487748A
publication
Critical
patent/GB1487748A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04S—STEREOPHONIC SYSTEMS
H04S3/00—Systems employing more than two channels, e.g. quadraphonic
H04S3/02—Systems employing more than two channels, e.g. quadraphonic of the matrix type, i.e. in which input signals are combined algebraically, e.g. after having been phase shifted with respect to each other
Abstract
1487748 Matrix quadraphonic decoders HITACHI Ltd and SANSUI ELECTRIC CO Ltd 24 Sept 1974 [26 Sept 1973 8 May 1974] 41570/74 Heading H4R In a signal composing circuit, particularly for dematrixing a matrixed quadraphonic signal, a first circuit, comprising a differential amplifier including two three electrode amplifying elements, e.g. transistors Q5 and Q6 with resistors R 9 and R 10 connecting the emitters to the common current source, is used in conjunction with a second circuit comprising a circuit Q1, Q2 similar to the differential amplifier of the first circuit but with the common current source bypassed by a capacitor so that the circuit acts as a pair of inverters, or a similar circuit Q3, Q4 with bypassed common current source and a common load R5 so that the circuit acts as an adder. The current sources Q7, Q8 and Q9 are controlled to feed identical currents to the respective circuits and the load impedances R1, R2, R5 and R8 are selected so that the output levels of the circuits are the same. Fig. 5 shows a matrix four channel decoder which is fed with the signals LT and RT and including a first signal composing stage having transistors Q1 and Q2, which are parallel connected, in series with a bypassed constant current supply to provide phase inverted LT and RT signals across the respective loads R1 and R2, each transistor providing a gain of #2. A similar circuit including transistors Q3 and Q4 has a common load resistor R5 and gains of 1 so that the output signal is – (LT+RT) while a differential amplifier Q5, Q6 provides an output LT – RT. The four signals from the first signal composing stage are fed through respective gain control stages each having a constant current load circuit Q14, Q16, Q18 or Q20 for a respective amplifying transistor Q10, Q11, Q12, or Q13, and an output transistor Q15, Q17, Q19 or Q21, with negative feedback controlled by variable resistors Rr, Rl, Rb, and Rf. The resulting gain controlled signals are fed to a second composing circuit using differential amplifiers Q22, Q23; Q26, Q27; and Q28, Q29 and a summing circuit Q24, Q25, to provide output signals The circuit may be constructed as a monolithic integrated circuit with the variable resistors Rr, Rl, Rb and Rf formed by the drain source conductance of MOS type f.e.t.’s. In a modification of part of one of the signal composing circuits f.e.t.’s are used instead of bipolar transistors Fig. 3 (not shown).
GB41570/74A
1973-09-26
1974-09-24
Signal composing circuits
Expired
GB1487748A
(en)
Applications Claiming Priority (2)
Application Number
Priority Date
Filing Date
Title
JP10819973A
JPS532721B2
(en)
1973-09-26
1973-09-26
JP5028974A
JPS569840B2
(en)
1974-05-08
1974-05-08
Publications (1)
Publication Number
Publication Date
GB1487748A
true
GB1487748A
(en)
1977-10-05
Family
ID=26390745
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB41570/74A
Expired
GB1487748A
(en)
1973-09-26
1974-09-24
Signal composing circuits
Country Status (3)
Country
Link
US
(1)
US3947637A
(en)
DE
(1)
DE2445123C3
(en)
GB
(1)
GB1487748A
(en)
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US20210268406A1
(en)
*
2012-03-15
2021-09-02
Flodesign Sonics, Inc.
Electronic configuration and control for acoustic standing wave generation
Families Citing this family (6)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
JPS55153405A
(en)
*
1979-05-18
1980-11-29
Sanyo Electric Co Ltd
Fm detection circuit
US4799260A
(en)
*
1985-03-07
1989-01-17
Dolby Laboratories Licensing Corporation
Variable matrix decoder
US5046098A
(en)
*
1985-03-07
1991-09-03
Dolby Laboratories Licensing Corporation
Variable matrix decoder with three output channels
JPH0246010A
(en)
*
1988-08-08
1990-02-15
N S:Kk
Wide band amplifier
US6788113B2
(en)
*
2001-06-19
2004-09-07
Fujitsu Limited
Differential signal output apparatus, semiconductor integrated circuit apparatus having the differential signal output apparatus, and differential signal transmission system
CN101753130B
(en)
*
2008-12-12
2013-02-27
延世大学工业学术合作社
Bit conversion point extract circuit and lock phase clock recovery circuit of non-return-to-zero (NRZ) recovery signal and method for controlling circuits
Family Cites Families (5)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3178651A
(en)
*
1961-08-03
1965-04-13
United Aircraft Corp
Differential amplifier
US3482177A
(en)
*
1966-10-03
1969-12-02
Gen Electric
Transistor differential operational amplifier
US3706937A
(en)
*
1970-12-03
1972-12-19
Nat Semiconductor Corp
Gain controlled amplifier for integrated circuit applications
JPS5147321B1
(en)
*
1971-06-21
1976-12-14
GB1402320A
(en)
*
1971-10-25
1975-08-06
Sansui Electric Co
Decoder for use in 4-2-4 matrix playback system
1974
1974-09-20
DE
DE2445123A
patent/DE2445123C3/en
not_active
Expired
1974-09-24
GB
GB41570/74A
patent/GB1487748A/en
not_active
Expired
1974-09-26
US
US05/509,339
patent/US3947637A/en
not_active
Expired – Lifetime
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US20210268406A1
(en)
*
2012-03-15
2021-09-02
Flodesign Sonics, Inc.
Electronic configuration and control for acoustic standing wave generation
Also Published As
Publication number
Publication date
DE2445123A1
(en)
1975-04-03
DE2445123C3
(en)
1980-03-06
US3947637A
(en)
1976-03-30
DE2445123B2
(en)
1979-06-28
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Legal Events
Date
Code
Title
Description
1978-02-15
PS
Patent sealed [section 19, patents act 1949]
1994-10-26
PE20
Patent expired after termination of 20 years
Effective date:
19940923
