GB1512029A – Formation of thin layer patterns on a substrate
– Google Patents
GB1512029A – Formation of thin layer patterns on a substrate
– Google Patents
Formation of thin layer patterns on a substrate
Info
Publication number
GB1512029A
GB1512029A
GB3118575A
GB3118575A
GB1512029A
GB 1512029 A
GB1512029 A
GB 1512029A
GB 3118575 A
GB3118575 A
GB 3118575A
GB 3118575 A
GB3118575 A
GB 3118575A
GB 1512029 A
GB1512029 A
GB 1512029A
Authority
GB
United Kingdom
Prior art keywords
thin layer
layer
photolacquer
substrate
areas
Prior art date
1974-07-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3118575A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Electronics UK Ltd
Original Assignee
Philips Electronic and Associated Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1974-07-30
Filing date
1975-07-25
Publication date
1978-05-24
1974-07-30
Priority claimed from DE19742436568
external-priority
patent/DE2436568C3/en
1975-07-25
Application filed by Philips Electronic and Associated Industries Ltd
filed
Critical
Philips Electronic and Associated Industries Ltd
1978-05-24
Publication of GB1512029A
publication
Critical
patent/GB1512029A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
H05K3/00—Apparatus or processes for manufacturing printed circuits
H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
H05K3/048—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
G—PHYSICS
G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F7/004—Photosensitive materials
G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
G03F7/11—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
G—PHYSICS
G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F7/26—Processing photosensitive materials; Apparatus therefor
G03F7/40—Treatment after imagewise removal, e.g. baking
G—PHYSICS
G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F7/26—Processing photosensitive materials; Apparatus therefor
G03F7/42—Stripping or agents therefor
G03F7/428—Stripping or agents therefor using ultrasonic means only
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/0001—Technical content checked by a classifier
H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
1512029 Forming thin layer patterns PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 25 July 1975 [30 July 1974] 31185/75 Heading B2E In a method for forming a thin layer pattern on a substrate e.g. for making integrated electronic circuits, in which a substrate is provided with a layer of supporting material, a photolacquer layer masking selected areas and a layer of the thin layer material then photolacquer and overlying areas of thin layer material are removed to leave the desired pattern, the supporting material is a material is such that after heating it has poor adhesion with the photolacquer layer, and the layered structure is subjected to a heating step to effect such poor adhesion prior to the step of removing the photolacquere. Suitable supporting layers are of aluminium applied by vapour deposition or cathode sputtering, or silica provided on a silicon substrate by surface oxidation. The photolacquer layer is provided by a conventional photolithographic method. The thin layer material may be a metal e.g. aluminium titanium, an oxide or nitride of silicon, a magnetic material such as nickel-iron or an alloy, and may be applied by cathode sputtering. Removal of the photolacquer and overlying thin layer areas is effected with a solvent optionally assisted by ultrasonic treatment. The heating step is suitably from 100- 200‹C for 30 minutes. The method can be used to form further layers e.g. of silica, aluminium and nickel-iron in selected areas.
GB3118575A
1974-07-30
1975-07-25
Formation of thin layer patterns on a substrate
Expired
GB1512029A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
DE19742436568
DE2436568C3
(en)
1974-07-30
Process for structuring thin layers
Publications (1)
Publication Number
Publication Date
GB1512029A
true
GB1512029A
(en)
1978-05-24
Family
ID=5921886
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB3118575A
Expired
GB1512029A
(en)
1974-07-30
1975-07-25
Formation of thin layer patterns on a substrate
Country Status (5)
Country
Link
JP
(1)
JPS5140770A
(en)
CA
(1)
CA1046648A
(en)
FR
(1)
FR2280717A1
(en)
GB
(1)
GB1512029A
(en)
NL
(1)
NL7508955A
(en)
Families Citing this family (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
JPS52107199U
(en)
*
1977-02-17
1977-08-15
JPH0459523A
(en)
*
1990-06-29
1992-02-26
Toa Tsushin Kogyo Kk
Vertical feeding conduit for lamination piece
DE102004034418B4
(en)
*
2004-07-15
2009-06-25
Schott Ag
Process for producing structured optical filter layers on substrates
1975
1975-07-24
CA
CA232,152A
patent/CA1046648A/en
not_active
Expired
1975-07-25
GB
GB3118575A
patent/GB1512029A/en
not_active
Expired
1975-07-26
JP
JP9072875A
patent/JPS5140770A/en
active
Pending
1975-07-28
NL
NL7508955A
patent/NL7508955A/en
not_active
Application Discontinuation
1975-07-29
FR
FR7523629A
patent/FR2280717A1/en
active
Granted
Also Published As
Publication number
Publication date
DE2436568B2
(en)
1977-07-07
NL7508955A
(en)
1976-02-03
DE2436568A1
(en)
1976-02-12
FR2280717B1
(en)
1980-06-27
JPS5140770A
(en)
1976-04-05
FR2280717A1
(en)
1976-02-27
CA1046648A
(en)
1979-01-16
Similar Documents
Publication
Publication Date
Title
US4119483A
(en)
1978-10-10
Method of structuring thin layers
US3443944A
(en)
1969-05-13
Method of depositing conductive patterns on a substrate
US4424271A
(en)
1984-01-03
Deposition process
JPS5656636A
(en)
1981-05-18
Processing method of fine pattern
GB1512029A
(en)
1978-05-24
Formation of thin layer patterns on a substrate
JPS60167448A
(en)
1985-08-30
Method of wiring metal of integrated circuit
ATE46791T1
(en)
1989-10-15
METHOD FOR SELECTIVE FILLING OF CONTACT HOLES ETCHED IN INSULATING LAYERS WITH METALLIC CONDUCTIVE MATERIALS IN THE MANUFACTURE OF HIGHLY INTEGRATED SEMICONDUCTOR CIRCUITS AND A DEVICE FOR CARRYING OUT THE METHOD.
US3919066A
(en)
1975-11-11
Method of manufacturing etched patterns
US3615947A
(en)
1971-10-26
Method of selective etching
US3592707A
(en)
1971-07-13
Precision masking using silicon nitride and silicon oxide
JPS52119172A
(en)
1977-10-06
Forming method of fine pattern
US4035206A
(en)
1977-07-12
Method of manufacturing a semiconductor device having a pattern of conductors
US4199379A
(en)
1980-04-22
Method for producing metal patterns on silicon wafers for thermomigration
JPS6235361A
(en)
1987-02-16
Photomask material
JPS5519873A
(en)
1980-02-12
Forming method of metallic layer pattern for semiconductor
JPS6436024A
(en)
1989-02-07
Formation of wiring of semiconductor device
JPS5493970A
(en)
1979-07-25
Patttern forming method of multi-layer metallic thin film
JPH08186115A
(en)
1996-07-16
Method for metal film forming
JPS61250168A
(en)
1986-11-07
Production of thin film
JPS5735860A
(en)
1982-02-26
Preparation of photomask
JPS55107781A
(en)
1980-08-19
Etching method for metal film
JPS5620164A
(en)
1981-02-25
Formation of metallic film pattern
CH636238GA3
(en)
1983-05-31
Method for producing parts of timepieces
JPS6273744A
(en)
1987-04-04
Forming method for metal wiring pattern
JPS63146451A
(en)
1988-06-18
Formation of interconnection pattern
Legal Events
Date
Code
Title
Description
1978-10-04
PS
Patent sealed
1982-02-24
PCNP
Patent ceased through non-payment of renewal fee