AU3229884A

AU3229884A – Data select match
– Google Patents

AU3229884A – Data select match
– Google Patents
Data select match

Info

Publication number
AU3229884A

AU3229884A
AU32298/84A
AU3229884A
AU3229884A
AU 3229884 A
AU3229884 A
AU 3229884A
AU 32298/84 A
AU32298/84 A
AU 32298/84A
AU 3229884 A
AU3229884 A
AU 3229884A
AU 3229884 A
AU3229884 A
AU 3229884A
Authority
AU
Australia
Prior art keywords
data select
select match
match
data
select
Prior art date
1983-08-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Granted

Application number
AU32298/84A
Other versions

AU568871B2
(en

Inventor
Gene Myron Amdahl
Donald Laverne Hanson
Loren Paul Staley
Gary Arthur Woffinden
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu IT Holdings Inc

Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1983-08-30
Filing date
1984-08-22
Publication date
1985-03-07

1984-08-22
Application filed by Amdahl Corp
filed
Critical
Amdahl Corp

1985-03-07
Publication of AU3229884A
publication
Critical
patent/AU3229884A/en

1988-01-14
Application granted
granted
Critical

1988-01-14
Publication of AU568871B2
publication
Critical
patent/AU568871B2/en

2004-08-22
Anticipated expiration
legal-status
Critical

Status
Ceased
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F12/00—Accessing, addressing or allocating within memory systems or architectures

G06F12/02—Addressing or allocation; Relocation

G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

G06F2212/60—Details of cache memory

G06F2212/608—Details relating to cache mapping

G06F2212/6082—Way prediction in set-associative cache

AU32298/84A
1983-08-30
1984-08-22
Data select match

Ceased

AU568871B2
(en)

Applications Claiming Priority (2)

Application Number
Priority Date
Filing Date
Title

US06/527,674

US4631660A
(en)

1983-08-30
1983-08-30
Addressing system for an associative cache memory

US527674

1983-08-30

Publications (2)

Publication Number
Publication Date

AU3229884A
true

AU3229884A
(en)

1985-03-07

AU568871B2

AU568871B2
(en)

1988-01-14

Family
ID=24102458
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

AU32298/84A
Ceased

AU568871B2
(en)

1983-08-30
1984-08-22
Data select match

Country Status (5)

Country
Link

US
(1)

US4631660A
(en)

EP
(1)

EP0139407B1
(en)

AU
(1)

AU568871B2
(en)

CA
(1)

CA1212483A
(en)

DE
(1)

DE3482740D1
(en)

Families Citing this family (23)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US4991081A
(en)

*

1984-10-31
1991-02-05
Texas Instruments Incorporated
Cache memory addressable by both physical and virtual addresses

US4972338A
(en)

*

1985-06-13
1990-11-20
Intel Corporation
Memory management for microprocessor system

JPH0195347A
(en)

*

1987-10-08
1989-04-13
Nec Corp
System for converting address

US5210843A
(en)

*

1988-03-25
1993-05-11
Northern Telecom Limited
Pseudo set-associative memory caching arrangement

US5129090A
(en)

*

1988-05-26
1992-07-07
Ibm Corporation
System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration

US5029070A
(en)

*

1988-08-25
1991-07-02
Edge Computer Corporation
Coherent cache structures and methods

US5230068A
(en)

*

1990-02-26
1993-07-20
Nexgen Microsystems
Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence

US5566324A
(en)

*

1992-12-24
1996-10-15
Ncr Corporation
Computer apparatus including a main memory prefetch cache and method of operation thereof

US5584002A
(en)

*

1993-02-22
1996-12-10
International Business Machines Corporation
Cache remapping using synonym classes

US5493669A
(en)

*

1993-03-03
1996-02-20
Motorola, Inc.
Data processor for simultaneously searching two fields of the rename buffer having first and second most recently allogated bits

US5504914A
(en)

*

1993-06-23
1996-04-02
National Science Council
Multi-level instruction boosting method using plurality of ordinary registers forming plurality of conjugate register pairs that are shadow registers to each other with different only in MSB

EP0675443A1
(en)

*

1994-03-30
1995-10-04
Digital Equipment Corporation
Apparatus and method for accessing direct mapped cache

US5550974A
(en)

*

1994-04-15
1996-08-27
Motorola, Inc.
Testable memory array which is immune to multiple wordline assertions during scan testing

US5539892A
(en)

*

1994-08-02
1996-07-23
Motorola, Inc.
Address translation lookaside buffer replacement apparatus and method with user override

US5548742A
(en)

*

1994-08-11
1996-08-20
Intel Corporation
Method and apparatus for combining a direct-mapped cache and a multiple-way cache in a cache memory

US5636224A
(en)

*

1995-04-28
1997-06-03
Motorola Inc.
Method and apparatus for interleave/de-interleave addressing in data communication circuits

US5893146A
(en)

*

1995-08-31
1999-04-06
Advanced Micro Design, Inc.
Cache structure having a reduced tag comparison to enable data transfer from said cache

TW322543B
(en)

*

1997-06-26
1997-12-11
United Microelectronics Corp
Computer address transfer system and method

US6535218B1
(en)

1998-05-21
2003-03-18
Mitsubishi Electric & Electronics Usa, Inc.
Frame buffer memory for graphic processing

US6504550B1
(en)

1998-05-21
2003-01-07
Mitsubishi Electric & Electronics Usa, Inc.
System for graphics processing employing semiconductor device

US6559851B1
(en)

1998-05-21
2003-05-06
Mitsubishi Electric & Electronics Usa, Inc.
Methods for semiconductor systems for graphics processing

US6661421B1
(en)

1998-05-21
2003-12-09
Mitsubishi Electric & Electronics Usa, Inc.
Methods for operation of semiconductor memory

US6658552B1
(en)

*

1998-10-23
2003-12-02
Micron Technology, Inc.
Processing system with separate general purpose execution unit and data string manipulation unit

Family Cites Families (7)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3829840A
(en)

*

1972-07-24
1974-08-13
Ibm
Virtual memory system

US3840863A
(en)

*

1973-10-23
1974-10-08
Ibm
Dynamic storage hierarchy system

US4045781A
(en)

*

1976-02-13
1977-08-30
Digital Equipment Corporation
Memory module with selectable byte addressing for digital data processing system

US4168541A
(en)

*

1978-09-25
1979-09-18
Sperry Rand Corporation
Paired least recently used block replacement system

US4381541A
(en)

*

1980-08-28
1983-04-26
Sperry Corporation
Buffer memory referencing system for two data words

US4400770A
(en)

*

1980-11-10
1983-08-23
International Business Machines Corporation
Cache synonym detection and handling means

US4441155A
(en)

*

1981-11-23
1984-04-03
International Business Machines Corporation
Page controlled cache directory addressing

1983

1983-08-30
US
US06/527,674
patent/US4631660A/en
not_active
Expired – Lifetime

1984

1984-08-22
AU
AU32298/84A
patent/AU568871B2/en
not_active
Ceased

1984-08-24
DE
DE8484305824T
patent/DE3482740D1/en
not_active
Expired – Lifetime

1984-08-24
EP
EP84305824A
patent/EP0139407B1/en
not_active
Expired

1984-08-28
CA
CA000461941A
patent/CA1212483A/en
not_active
Expired

Also Published As

Publication number
Publication date

DE3482740D1
(en)

1990-08-23

CA1212483A
(en)

1986-10-07

EP0139407A3
(en)

1987-08-19

US4631660A
(en)

1986-12-23

EP0139407A2
(en)

1985-05-02

EP0139407B1
(en)

1990-07-18

AU568871B2
(en)

1988-01-14

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