AU4766285A - Creación de Inventos y Patentes con Inteligencia Artificial

AU4766285A – Data transfer system
– Google Patents

AU4766285A – Data transfer system
– Google Patents
Data transfer system

Info

Publication number
AU4766285A

AU4766285A
AU47662/85A
AU4766285A
AU4766285A
AU 4766285 A
AU4766285 A
AU 4766285A
AU 47662/85 A
AU47662/85 A
AU 47662/85A
AU 4766285 A
AU4766285 A
AU 4766285A
AU 4766285 A
AU4766285 A
AU 4766285A
Authority
AU
Australia
Prior art keywords
data transfer
transfer system
data
transfer
Prior art date
1984-09-21
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Granted

Application number
AU47662/85A
Other versions

AU571738B2
(en

Inventor
Richard James Humpleman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Services Ltd

Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1984-09-21
Filing date
1985-09-20
Publication date
1986-03-27

1985-09-20
Application filed by Fujitsu Services Ltd
filed
Critical
Fujitsu Services Ltd

1986-03-27
Publication of AU4766285A
publication
Critical
patent/AU4766285A/en

1988-04-21
Application granted
granted
Critical

1988-04-21
Publication of AU571738B2
publication
Critical
patent/AU571738B2/en

2005-09-20
Anticipated expiration
legal-status
Critical

Status
Ceased
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F13/38—Information transfer, e.g. on bus

G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation

G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus

G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

AU47662/85A
1984-09-21
1985-09-20
Data transfer system

Ceased

AU571738B2
(en)

Applications Claiming Priority (2)

Application Number
Priority Date
Filing Date
Title

GB8423968

1984-09-21

GB8423968

1984-09-21

Publications (2)

Publication Number
Publication Date

AU4766285A
true

AU4766285A
(en)

1986-03-27

AU571738B2

AU571738B2
(en)

1988-04-21

Family
ID=10567098
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

AU47662/85A
Ceased

AU571738B2
(en)

1984-09-21
1985-09-20
Data transfer system

Country Status (5)

Country
Link

US
(1)

US4691294A
(en)

EP
(1)

EP0175564B1
(en)

AU
(1)

AU571738B2
(en)

DE
(1)

DE3584751D1
(en)

ZA
(1)

ZA857137B
(en)

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

AU572738B2
(en)

1985-09-30
1988-05-12
Siemens Aktiengesellschaft
Synchronous serial interface

Families Citing this family (31)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US4370605A
(en)

1980-09-02
1983-01-25
Westinghouse Electric Corp.
Two-speed motor control

US5162917A
(en)

1983-04-02
1992-11-10
Canon Kabushiki Kaisha
Image data communication control system with image recorder status data output in synchronism with either internally or externally generated clock pulses

GB8610888D0
(en)

1986-05-03
1986-06-11
Int Computers Ltd
Variable delay circuit

JPH07105818B2
(en)

1986-05-19
1995-11-13
株式会社日立製作所

Parallel transmission method

DE3779313D1
(en)

1987-08-20
1992-06-25
Ibm

INTERFACE MECHANISM FOR INFORMATION TRANSFER CONTROL BETWEEN TWO DEVICES.

US4807258A
(en)

1987-11-17
1989-02-21
Gte Laboratories Incorporated
Method for synchronizing a digital communication system

US4943984A
(en)

1988-06-24
1990-07-24
International Business Machines Corporation
Data processing system parallel data bus having a single oscillator clocking apparatus

US5594866A
(en)

1989-01-18
1997-01-14
Intel Corporation
Message routing in a multi-processor computer system with alternate edge strobe regeneration

EP0397302A3
(en)

1989-05-12
1991-12-04
Flavors Technology, Inc.,
Synchronous bus

KR930001922B1
(en)

1989-08-28
1993-03-20
가부시기가이샤 히다찌세이사꾸쇼
Data processor

EP0525221B1
(en)

1991-07-20
1995-12-27
International Business Machines Corporation
Quasi-synchronous information transfer and phase alignment means for enabling same

DE4390991B4
(en)

1992-03-06
2004-08-05
Rambus Inc., Los Altos
Synchronous bus system for minimising clock-data skew – has data bus and clock source feeding clockline with two segments, data travels on data bus in constant phase relationship with clock signal

DE4345604B3
(en)

1992-03-06
2012-07-12
Rambus Inc.

Device for communication with a DRAM

EP0632616B1
(en)

1993-06-30
1999-02-24
Siemens Aktiengesellschaft
Data security method in a B-ISDN telecommunications system

US5608755A
(en)

1994-10-14
1997-03-04
Rakib; Selim
Method and apparatus for implementing carrierless amplitude/phase encoding in a network

US5822571A
(en)

1996-06-05
1998-10-13
Compaq Computer Corporation
Synchronizing data between devices

US5799175A
(en)

1996-07-01
1998-08-25
Sun Microsystems, Inc.
Synchronization system and method for plesiochronous signaling

US5850528A
(en)

1996-08-23
1998-12-15
Emc Corporation
Bus timing protocol for a data storage system

US5987576A
(en)

1997-02-27
1999-11-16
Hewlett-Packard Company
Method and apparatus for generating and distributing clock signals with minimal skew

US6151682A
(en)

1997-09-08
2000-11-21
Sarnoff Corporation
Digital signal processing circuitry having integrated timing information

US6473871B1
(en)

1999-08-31
2002-10-29
Sun Microsystems, Inc.
Method and apparatus for HASS testing of busses under programmable control

US6535945B1
(en)

1999-08-31
2003-03-18
Sun Microsystems, Inc.
Method and apparatus for programmable adjustment of computer system bus parameters

US6609221B1
(en)

1999-08-31
2003-08-19
Sun Microsystems, Inc.
Method and apparatus for inducing bus saturation during operational testing of busses using a pattern generator

US6502212B1
(en)

1999-08-31
2002-12-31
Sun Microsystems, Inc.
Method and apparatus for bus parameter optimization using probes of system configurations

US6275077B1
(en)

1999-08-31
2001-08-14
Sun Microsystems, Inc.
Method and apparatus for programmable adjustment of bus driver propagation times

US6546507B1
(en)

1999-08-31
2003-04-08
Sun Microsystems, Inc.
Method and apparatus for operational envelope testing of busses to identify halt limits

US6499113B1
(en)

1999-08-31
2002-12-24
Sun Microsystems, Inc.
Method and apparatus for extracting first failure and attendant operating information from computer system devices

US6986052B1
(en)

2000-06-30
2006-01-10
Intel Corporation
Method and apparatus for secure execution using a secure memory partition

GB2388501A
(en)

2002-05-09
2003-11-12
Sony Uk Ltd
Data packet and clock signal transmission via different paths

US7350001B1
(en)

2003-01-17
2008-03-25
Cirrus Logic, Inc.
Method and apparatus for automatic word length conversion

US20080065925A1
(en)

2006-09-08
2008-03-13
Oliverio James C
System and methods for synchronizing performances of geographically-disparate performers

Family Cites Families (11)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3936604A
(en)

1970-01-02
1976-02-03
Stromberg-Carlson Corporation
Synchronization of clocks in digital signalling networks

US3801981A
(en)

1971-04-23
1974-04-02
Us Navy
Remote clock synchronization system

US3940558A
(en)

1975-01-31
1976-02-24
Digital Communications Corporation
Remote master/slave station clock

US3992580A
(en)

1975-04-24
1976-11-16
The United States Of America As Represented By The Secretary Of The Army
Discrete control correction for synchronizing digital networks

FR2336009A1
(en)

1975-12-19
1977-07-15
Cit Alcatel
Synchronisation of distant digital equipment – employs returned clock pulses to block clock counter unless pulses are coincident

US4047201A
(en)

1976-02-27
1977-09-06
Data General Corporation
I/O Bus transceiver for a data processing system

US4156798A
(en)

1977-08-29
1979-05-29
Doelz Melvin L
Small packet communication network

US4208724A
(en)

1977-10-17
1980-06-17
Sperry Corporation
System and method for clocking data between a remote unit and a local unit

JPS5654529A
(en)

1979-10-08
1981-05-14
Nec Corp
Data processor

US4395756A
(en)

1981-02-17
1983-07-26
Pitney Bowes Inc.
Processor implemented communications interface having external clock actuated disabling control

US4519034A
(en)

1982-06-30
1985-05-21
Elxsi
I/O Bus clock

1985

1985-09-17
EP
EP85306584A
patent/EP0175564B1/en
not_active
Expired – Lifetime

1985-09-17
DE
DE8585306584T
patent/DE3584751D1/en
not_active
Expired – Fee Related

1985-09-17
US
US06/776,823
patent/US4691294A/en
not_active
Expired – Lifetime

1985-09-17
ZA
ZA857137A
patent/ZA857137B/en
unknown

1985-09-20
AU
AU47662/85A
patent/AU571738B2/en
not_active
Ceased

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

AU572738B2
(en)

1985-09-30
1988-05-12
Siemens Aktiengesellschaft
Synchronous serial interface

Also Published As

Publication number
Publication date

US4691294A
(en)

1987-09-01

EP0175564A3
(en)

1988-06-22

DE3584751D1
(en)

1992-01-09

EP0175564B1
(en)

1991-11-27

ZA857137B
(en)

1986-04-30

EP0175564A2
(en)

1986-03-26

AU571738B2
(en)

1988-04-21

Información de contacto