AU519313B2

AU519313B2 – Range count and main memory address accounting system
– Google Patents

AU519313B2 – Range count and main memory address accounting system
– Google Patents
Range count and main memory address accounting system

Info

Publication number
AU519313B2

AU519313B2
AU38325/78A
AU3832578A
AU519313B2
AU 519313 B2
AU519313 B2
AU 519313B2
AU 38325/78 A
AU38325/78 A
AU 38325/78A
AU 3832578 A
AU3832578 A
AU 3832578A
AU 519313 B2
AU519313 B2
AU 519313B2
Authority
AU
Australia
Prior art keywords
main memory
memory address
accounting system
range count
address accounting
Prior art date
1977-08-04
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Ceased

Application number
AU38325/78A
Other versions

AU3832578A
(en

Inventor
Edward F. Getson Jr.
John H. Kelley
Albert T. Mclaughlin
Donald J. Rathbun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Bull HN Information Systems Inc

Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1977-08-04
Filing date
1978-07-25
Publication date
1981-11-26

1978-07-25
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc
filed
Critical
Honeywell Information Systems Italia SpA

1980-01-31
Publication of AU3832578A
publication
Critical
patent/AU3832578A/en

1981-11-26
Application granted
granted
Critical

1981-11-26
Publication of AU519313B2
publication
Critical
patent/AU519313B2/en

1994-07-25
Anticipated expiration
legal-status
Critical

Status
Ceased
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled

G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory

G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations

G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F13/10—Program control for peripheral devices

G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor

G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F13/14—Handling requests for interconnection or transfer

G06F13/20—Handling requests for interconnection or transfer for access to input/output bus

G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

AU38325/78A
1977-08-04
1978-07-25
Range count and main memory address accounting system

Ceased

AU519313B2
(en)

Applications Claiming Priority (2)

Application Number
Priority Date
Filing Date
Title

US05/821,900

US4204250A
(en)

1977-08-04
1977-08-04
Range count and main memory address accounting system

US821900

1977-08-04

Publications (2)

Publication Number
Publication Date

AU3832578A

AU3832578A
(en)

1980-01-31

AU519313B2
true

AU519313B2
(en)

1981-11-26

Family
ID=25234561
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

AU38325/78A
Ceased

AU519313B2
(en)

1977-08-04
1978-07-25
Range count and main memory address accounting system

Country Status (4)

Country
Link

US
(1)

US4204250A
(en)

JP
(1)

JPS5428530A
(en)

AU
(1)

AU519313B2
(en)

CA
(1)

CA1115424A
(en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US4780808A
(en)

*

1981-11-27
1988-10-25
Storage Technology Corporation
Control of cache buffer for memory subsystem

US4692859A
(en)

*

1983-05-16
1987-09-08
Rca Corporation
Multiple byte serial data transfer protocol

US4549262A
(en)

*

1983-06-20
1985-10-22
Western Digital Corporation
Chip topography for a MOS disk memory controller circuit

JPS6073868U
(en)

*

1983-10-28
1985-05-24
株式会社 土屋製作所

Cyclone type precleaner

JPS60201025A
(en)

*

1984-03-27
1985-10-11
Mazda Motor Corp
Suction system structure of engine with pressure wave supercharger

JPH0760423B2
(en)

*

1984-12-24
1995-06-28
株式会社日立製作所

Data transfer method

US4821180A
(en)

*

1985-02-25
1989-04-11
Itt Corporation
Device interface controller for intercepting communication between a microcomputer and peripheral devices to control data transfers

US4682283A
(en)

*

1986-02-06
1987-07-21
Rockwell International Corporation
Address range comparison system using multiplexer for detection of range identifier bits stored in dedicated RAM’s

US5086388A
(en)

*

1988-03-18
1992-02-04
Hitachi Maxell, Ltd.
Semiconductor serial/parallel-parallel/serial file memory and storage system

JP2923786B2
(en)

*

1988-03-18
1999-07-26
日立マクセル株式会社

Semiconductor file memory and storage system using the same

US5206935A
(en)

*

1991-03-26
1993-04-27
Sinks Rod G
Apparatus and method for fast i/o data transfer in an intelligent cell

US5628026A
(en)

*

1994-12-05
1997-05-06
Motorola, Inc.
Multi-dimensional data transfer in a data processing system and method therefor

DE50113128D1
(en)

*

2001-12-03
2007-11-22
Infineon Technologies Ag

Data communications equipment

Family Cites Families (8)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3504345A
(en)

*

1967-05-29
1970-03-31
Gen Electric
Input/output control apparatus

US3638195A
(en)

*

1970-04-13
1972-01-25
Battelle Development Corp
Digital communication interface

US3668645A
(en)

*

1970-05-25
1972-06-06
Gen Datacomm Ind Inc
Programable asynchronous data buffer having means to transmit error protected channel control signals

US3665417A
(en)

*

1971-02-19
1972-05-23
Nasa
Flexible computer accessed telemetry

NL7105512A
(en)

*

1971-04-23
1972-10-25

US3997878A
(en)

*

1973-07-27
1976-12-14
Rockwell International Corporation
Serial data multiplexing apparatus

US3950735A
(en)

*

1974-01-04
1976-04-13
Honeywell Information Systems, Inc.
Method and apparatus for dynamically controlling read/write operations in a peripheral subsystem

US3993981A
(en)

*

1975-06-30
1976-11-23
Honeywell Information Systems, Inc.
Apparatus for processing data transfer requests in a data processing system

1977

1977-08-04
US
US05/821,900
patent/US4204250A/en
not_active
Expired – Lifetime

1978

1978-05-25
CA
CA304,098A
patent/CA1115424A/en
not_active
Expired

1978-07-25
AU
AU38325/78A
patent/AU519313B2/en
not_active
Ceased

1978-08-04
JP
JP9471078A
patent/JPS5428530A/en
active
Granted

Also Published As

Publication number
Publication date

AU3832578A
(en)

1980-01-31

US4204250A
(en)

1980-05-20

JPS6330657B2
(en)

1988-06-20

CA1115424A
(en)

1981-12-29

JPS5428530A
(en)

1979-03-03

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