AU1989495A

AU1989495A – Methods and apparatus for translating incompatible bus transactions
– Google Patents

AU1989495A – Methods and apparatus for translating incompatible bus transactions
– Google Patents
Methods and apparatus for translating incompatible bus transactions

Info

Publication number
AU1989495A

AU1989495A
AU19894/95A
AU1989495A
AU1989495A
AU 1989495 A
AU1989495 A
AU 1989495A
AU 19894/95 A
AU19894/95 A
AU 19894/95A
AU 1989495 A
AU1989495 A
AU 1989495A
AU 1989495 A
AU1989495 A
AU 1989495A
Authority
AU
Australia
Prior art keywords
translating
methods
bus transactions
incompatible bus
incompatible
Prior art date
1994-03-14
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Abandoned

Application number
AU19894/95A
Inventor
Michael J. Dhuey
Farid A Yazdy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Apple Inc

Original Assignee
Apple Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1994-03-14
Filing date
1995-03-13
Publication date
1995-10-03

1995-03-13
Application filed by Apple Computer Inc
filed
Critical
Apple Computer Inc

1995-10-03
Publication of AU1989495A
publication
Critical
patent/AU1989495A/en

Status
Abandoned
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06F—ELECTRIC DIGITAL DATA PROCESSING

G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

G06F13/38—Information transfer, e.g. on bus

G06F13/40—Bus structure

G06F13/4063—Device-to-bus coupling

AU19894/95A
1994-03-14
1995-03-13
Methods and apparatus for translating incompatible bus transactions

Abandoned

AU1989495A
(en)

Applications Claiming Priority (3)

Application Number
Priority Date
Filing Date
Title

US212457

1994-03-14

US08/212,457

US5600802A
(en)

1994-03-14
1994-03-14
Methods and apparatus for translating incompatible bus transactions

PCT/US1995/003061

WO1995025309A1
(en)

1994-03-14
1995-03-13
Methods and apparatus for translating incompatible bus transactions

Publications (1)

Publication Number
Publication Date

AU1989495A
true

AU1989495A
(en)

1995-10-03

Family
ID=22791102
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

AU19894/95A
Abandoned

AU1989495A
(en)

1994-03-14
1995-03-13
Methods and apparatus for translating incompatible bus transactions

Country Status (3)

Country
Link

US
(1)

US5600802A
(en)

AU
(1)

AU1989495A
(en)

WO
(1)

WO1995025309A1
(en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US6009540A
(en)

*

1997-04-08
1999-12-28
Aitm Associates Incorporated
Logic module for implementing system changes on PC architecture computers

US6226741B1
(en)

*

1998-04-03
2001-05-01
Asustek Computer Inc.
Jumperless computer system

US6092132A
(en)

*

1998-10-19
2000-07-18
International Business Machines Corporation
Method and apparatus for monitoring 60x bus signals at a reduced frequency

US6347394B1
(en)

1998-11-04
2002-02-12
Micron Technology, Inc.
Buffering circuit embedded in an integrated circuit device module used for buffering clocks and other input signals

US6609170B1
(en)

*

1999-12-29
2003-08-19
Intel Corporation
Method and apparatus for BIOS control of electrical device address/identification assignments

US6665224B1
(en)

*

2002-05-22
2003-12-16
Infineon Technologies Ag
Partial refresh for synchronous dynamic random access memory (SDRAM) circuits

US7231537B2
(en)

*

2003-07-03
2007-06-12
Micron Technology, Inc.
Fast data access mode in a memory device

US20080046625A1
(en)

*

2006-08-18
2008-02-21
Robert Spano
Sensor switching system for a computing device and related methods

Family Cites Families (13)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

JPS6226561A
(en)

*

1985-07-26
1987-02-04
Toshiba Corp
Personal computer

US5109506A
(en)

*

1989-06-19
1992-04-28
International Business Machines Corp.
Microcomputer system including a microprocessor reset circuit

US5321827A
(en)

*

1989-08-02
1994-06-14
Advanced Logic Research, Inc.
Computer system with modular upgrade capability

US5355489A
(en)

*

1989-08-25
1994-10-11
International Business Machines Corp.
Bios load for a personal computer system having a removable processor card

US5317721A
(en)

*

1989-11-06
1994-05-31
Zenith Data Systems Corporation
Method and apparatus to disable ISA devices for EISA addresses outside the ISA range

US5043877A
(en)

*

1990-10-12
1991-08-27
International Business Machines Corp.
Architecture converter for slave elements

AU1971992A
(en)

*

1991-04-18
1992-11-17
Intel Corporation
Method and apparatus for upgrading a computer processing system

US5355369A
(en)

*

1991-04-26
1994-10-11
At&T Bell Laboratories
High-speed integrated circuit testing with JTAG

EP0529142A1
(en)

*

1991-08-30
1993-03-03
Acer Incorporated
Upgradeable/downgradeable computers

US5341487A
(en)

*

1991-12-20
1994-08-23
International Business Machines Corp.
Personal computer having memory system with write-through cache and pipelined snoop cycles

WO1993022730A1
(en)

*

1992-05-04
1993-11-11
Compaq Computer Corporation
Signal routing circuit for microprocessor upgrade socket

US5293424A
(en)

*

1992-10-14
1994-03-08
Bull Hn Information Systems Inc.
Secure memory card

US5337464A
(en)

*

1992-11-20
1994-08-16
Dell U.S.A., L.P.
Method of convertibly upgrading a personal computer

1994

1994-03-14
US
US08/212,457
patent/US5600802A/en
not_active
Expired – Lifetime

1995

1995-03-13
AU
AU19894/95A
patent/AU1989495A/en
not_active
Abandoned

1995-03-13
WO
PCT/US1995/003061
patent/WO1995025309A1/en
active
Application Filing

Also Published As

Publication number
Publication date

US5600802A
(en)

1997-02-04

WO1995025309A1
(en)

1995-09-21

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AU1989495A
(en)

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Methods and apparatus for translating incompatible bus transactions

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