AU2668488A – A digital phase locked loop
– Google Patents
AU2668488A – A digital phase locked loop
– Google Patents
A digital phase locked loop
Info
Publication number
AU2668488A
AU2668488A
AU26684/88A
AU2668488A
AU2668488A
AU 2668488 A
AU2668488 A
AU 2668488A
AU 26684/88 A
AU26684/88 A
AU 26684/88A
AU 2668488 A
AU2668488 A
AU 2668488A
AU 2668488 A
AU2668488 A
AU 2668488A
Authority
AU
Australia
Prior art keywords
locked loop
phase locked
digital phase
digital
loop
Prior art date
1988-02-26
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU26684/88A
Other versions
AU604997B2
(en
Inventor
David Lawrence Archer
Bruce Francis Orr
Colin Rudolph
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Services Ltd
Original Assignee
Alcatel Australia Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1988-02-26
Filing date
1988-12-09
Publication date
1989-08-31
1988-12-09
Application filed by Alcatel Australia Ltd
filed
Critical
Alcatel Australia Ltd
1988-12-09
Priority to AU26684/88A
priority
Critical
patent/AU604997B2/en
1989-08-31
Publication of AU2668488A
publication
Critical
patent/AU2668488A/en
1991-01-03
Application granted
granted
Critical
1991-01-03
Publication of AU604997B2
publication
Critical
patent/AU604997B2/en
1991-11-28
Assigned to ALCATEL AUSTRALIA LIMITED
reassignment
ALCATEL AUSTRALIA LIMITED
Request to Amend Deed and Register
Assignors: STANDARD TELEPHONES AND CABLES PTY. LIMITED
2008-12-09
Anticipated expiration
legal-status
Critical
Status
Ceased
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04J—MULTIPLEX COMMUNICATION
H04J3/00—Time-division multiplex systems
H04J3/02—Details
H04J3/06—Synchronising arrangements
H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
H03L7/00—Automatic control of frequency or phase; Synchronisation
H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
H03L7/08—Details of the phase-locked loop
H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
H03L7/00—Automatic control of frequency or phase; Synchronisation
H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
H03L7/08—Details of the phase-locked loop
H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
H03L7/00—Automatic control of frequency or phase; Synchronisation
H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
H03L7/08—Details of the phase-locked loop
H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
H03L7/0993—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider and a circuit for adding and deleting pulses
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
H03L7/00—Automatic control of frequency or phase; Synchronisation
H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
AU26684/88A
1988-02-26
1988-12-09
A digital phase locked loop
Ceased
AU604997B2
(en)
Priority Applications (1)
Application Number
Priority Date
Filing Date
Title
AU26684/88A
AU604997B2
(en)
1988-02-26
1988-12-09
A digital phase locked loop
Applications Claiming Priority (3)
Application Number
Priority Date
Filing Date
Title
AUPI699388
1988-02-26
AUPI6993
1988-02-26
AU26684/88A
AU604997B2
(en)
1988-02-26
1988-12-09
A digital phase locked loop
Publications (2)
Publication Number
Publication Date
AU2668488A
true
AU2668488A
(en)
1989-08-31
AU604997B2
AU604997B2
(en)
1991-01-03
Family
ID=25620056
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
AU26684/88A
Ceased
AU604997B2
(en)
1988-02-26
1988-12-09
A digital phase locked loop
Country Status (1)
Country
Link
AU
(1)
AU604997B2
(en)
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU674444B2
(en)
*
1993-10-23
1996-12-19
Alcatel N.V.
Phase detector
Families Citing this family (2)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
DE4427972C1
(en)
*
1994-08-08
1995-07-27
Siemens Ag
Clock recovery from serial data stream by integrable phasing circuit
FR2748361B1
(en)
*
1996-05-02
1998-06-05
Alcatel Telspace
DIGITAL PHASE LOCKED LOOP FOR CLOCK RECOVERY
Family Cites Families (2)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4596937A
(en)
*
1982-04-28
1986-06-24
International Computers Limited
Digital phase-locked loop
US4694327A
(en)
*
1986-03-28
1987-09-15
Rca Corporation
Digital phase locked loop stabilization circuitry using a secondary digital phase locked loop
1988
1988-12-09
AU
AU26684/88A
patent/AU604997B2/en
not_active
Ceased
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU674444B2
(en)
*
1993-10-23
1996-12-19
Alcatel N.V.
Phase detector
Also Published As
Publication number
Publication date
AU604997B2
(en)
1991-01-03
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Legal Events
Date
Code
Title
Description
2002-07-11
MK14
Patent ceased section 143(a) (annual fees not paid) or expired
