AU3509084A – Flat package for integrated circuit memory chips
– Google Patents
AU3509084A – Flat package for integrated circuit memory chips
– Google Patents
Flat package for integrated circuit memory chips
Info
Publication number
AU3509084A
AU3509084A
AU35090/84A
AU3509084A
AU3509084A
AU 3509084 A
AU3509084 A
AU 3509084A
AU 35090/84 A
AU35090/84 A
AU 35090/84A
AU 3509084 A
AU3509084 A
AU 3509084A
AU 3509084 A
AU3509084 A
AU 3509084A
Authority
AU
Australia
Prior art keywords
integrated circuit
memory chips
circuit memory
flat package
package
Prior art date
1983-12-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU35090/84A
Other versions
AU568416B2
(en
Inventor
Louis E. Gates Jr.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1983-12-28
Filing date
1984-10-01
Publication date
1985-07-12
1984-10-01
Application filed by Raytheon Co
filed
Critical
Raytheon Co
1985-07-12
Publication of AU3509084A
publication
Critical
patent/AU3509084A/en
1987-12-24
Application granted
granted
Critical
1987-12-24
Publication of AU568416B2
publication
Critical
patent/AU568416B2/en
1999-01-21
Assigned to RAYTHEON COMPANY
reassignment
RAYTHEON COMPANY
Alteration of Name(s) in Register under S187
Assignors: HUGHES AIRCRAFT CO.
2004-10-01
Anticipated expiration
legal-status
Critical
Status
Ceased
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/12—Mountings, e.g. non-detachable insulating substrates
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, “first-level” interconnects; Manufacturing methods related thereto
H01L2224/42—Wire connectors; Manufacturing methods related thereto
H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
H01L2224/481—Disposition
H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, “first-level” interconnects; Manufacturing methods related thereto
H01L2224/42—Wire connectors; Manufacturing methods related thereto
H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
H01L2224/491—Disposition
H01L2224/4912—Layout
H01L2224/49171—Fan-out arrangements
AU35090/84A
1983-12-28
1984-10-01
Flat package for integrated circuit memory chips
Ceased
AU568416B2
(en)
Applications Claiming Priority (2)
Application Number
Priority Date
Filing Date
Title
US56636483A
1983-12-28
1983-12-28
US566364
1983-12-28
Publications (2)
Publication Number
Publication Date
AU3509084A
true
AU3509084A
(en)
1985-07-12
AU568416B2
AU568416B2
(en)
1987-12-24
Family
ID=24262576
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
AU35090/84A
Ceased
AU568416B2
(en)
1983-12-28
1984-10-01
Flat package for integrated circuit memory chips
Country Status (9)
Country
Link
EP
(1)
EP0167538B1
(en)
JP
(1)
JPS61500879A
(en)
KR
(1)
KR920007209B1
(en)
AU
(1)
AU568416B2
(en)
CA
(1)
CA1232082A
(en)
DE
(1)
DE3476297D1
(en)
ES
(1)
ES295772Y
(en)
IL
(1)
IL73562A
(en)
WO
(1)
WO1985002941A1
(en)
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU573451B2
(en)
*
1985-07-23
1988-06-09
Thomas & Betts Corporation
Leaded chip carrier connector
Families Citing this family (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2190555B
(en)
*
1986-05-03
1990-03-28
Burr Brown Ltd
Surface mounted single package data acquisition system
US4961633A
(en)
*
1988-02-22
1990-10-09
Xerox Corporation
VLSI optimized modulator
EP0689241A2
(en)
*
1991-10-17
1995-12-27
Fujitsu Limited
Carrier for carrying semiconductor device
KR100218291B1
(en)
*
1991-12-11
1999-09-01
구본준
Semiconductor package using a ceramic paddle and method of making same
Family Cites Families (5)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
JPS5471572A
(en)
*
1977-11-18
1979-06-08
Fujitsu Ltd
Semiconductor device
WO1981002367A1
(en)
*
1980-02-12
1981-08-20
Mostek Corp
Over/under dual in-line chip package
US4296456A
(en)
*
1980-06-02
1981-10-20
Burroughs Corporation
Electronic package for high density integrated circuits
JPS5923044Y2
(en)
*
1980-08-28
1984-07-10
栗山ゴム株式会社
Detachable adjustable stopper device for lining board
US4371912A
(en)
*
1980-10-01
1983-02-01
Motorola, Inc.
Method of mounting interrelated components
1984
1984-10-01
DE
DE8484903829T
patent/DE3476297D1/en
not_active
Expired
1984-10-01
AU
AU35090/84A
patent/AU568416B2/en
not_active
Ceased
1984-10-01
JP
JP59503857A
patent/JPS61500879A/en
active
Pending
1984-10-01
EP
EP84903829A
patent/EP0167538B1/en
not_active
Expired
1984-10-01
WO
PCT/US1984/001568
patent/WO1985002941A1/en
active
IP Right Grant
1984-11-20
IL
IL73562A
patent/IL73562A/en
not_active
IP Right Cessation
1984-12-20
CA
CA000470731A
patent/CA1232082A/en
not_active
Expired
1984-12-26
KR
KR1019840008332A
patent/KR920007209B1/en
not_active
IP Right Cessation
1984-12-27
ES
ES1984295772U
patent/ES295772Y/en
not_active
Expired
Cited By (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AU573451B2
(en)
*
1985-07-23
1988-06-09
Thomas & Betts Corporation
Leaded chip carrier connector
Also Published As
Publication number
Publication date
IL73562A
(en)
1988-07-31
KR850005150A
(en)
1985-08-21
EP0167538A1
(en)
1986-01-15
KR920007209B1
(en)
1992-08-27
AU568416B2
(en)
1987-12-24
WO1985002941A1
(en)
1985-07-04
DE3476297D1
(en)
1989-02-23
CA1232082A
(en)
1988-01-26
ES295772U
(en)
1987-11-01
IL73562A0
(en)
1985-02-28
ES295772Y
(en)
1988-05-16
JPS61500879A
(en)
1986-05-01
EP0167538B1
(en)
1989-01-18
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