AU4870885A – Timing recovery circuit for manchester coded data
– Google Patents
AU4870885A – Timing recovery circuit for manchester coded data
– Google Patents
Timing recovery circuit for manchester coded data
Info
Publication number
AU4870885A
AU4870885A
AU48708/85A
AU4870885A
AU4870885A
AU 4870885 A
AU4870885 A
AU 4870885A
AU 48708/85 A
AU48708/85 A
AU 48708/85A
AU 4870885 A
AU4870885 A
AU 4870885A
AU 4870885 A
AU4870885 A
AU 4870885A
Authority
AU
Australia
Prior art keywords
coded data
recovery circuit
timing recovery
manchester coded
manchester
Prior art date
1984-10-15
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU48708/85A
Other versions
AU575207B2
(en
Inventor
Tsuguo Maru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1984-10-15
Filing date
1985-10-15
Publication date
1986-04-24
1985-10-15
Application filed by NEC Corp
filed
Critical
NEC Corp
1986-04-24
Publication of AU4870885A
publication
Critical
patent/AU4870885A/en
1988-07-21
Application granted
granted
Critical
1988-07-21
Publication of AU575207B2
publication
Critical
patent/AU575207B2/en
2005-10-15
Anticipated expiration
legal-status
Critical
Status
Ceased
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L25/00—Baseband systems
H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
H04L25/40—Transmitting circuits; Receiving circuits
H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/04—Speed or phase control by synchronisation signals
H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/04—Speed or phase control by synchronisation signals
H04L7/10—Arrangements for initial synchronisation
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
AU48708/85A
1984-10-15
1985-10-15
Timing recovery circuit for manchester coded data
Ceased
AU575207B2
(en)
Applications Claiming Priority (2)
Application Number
Priority Date
Filing Date
Title
JP59215831A
JPS6194429A
(en)
1984-10-15
1984-10-15
Phase synchronizing circuit
JP59-215831
1984-10-15
Publications (2)
Publication Number
Publication Date
AU4870885A
true
AU4870885A
(en)
1986-04-24
AU575207B2
AU575207B2
(en)
1988-07-21
Family
ID=16678982
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
AU48708/85A
Ceased
AU575207B2
(en)
1984-10-15
1985-10-15
Timing recovery circuit for manchester coded data
Country Status (8)
Country
Link
US
(1)
US4661965A
(en)
EP
(1)
EP0178622B1
(en)
JP
(1)
JPS6194429A
(en)
AU
(1)
AU575207B2
(en)
CA
(1)
CA1242029A
(en)
DE
(1)
DE3568925D1
(en)
HK
(1)
HK19591A
(en)
SG
(1)
SG8791G
(en)
Families Citing this family (19)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
AR242878A1
(en)
*
1986-11-27
1993-05-31
Siemens Ag
Method and circuit for the recovery of the clock and/or the phase of a synchronous or plesiochronous data signal
GB2200518A
(en)
*
1987-01-30
1988-08-03
Crystalate Electronics
Data pulse timing
US4787095A
(en)
*
1987-03-03
1988-11-22
Advanced Micro Devices, Inc.
Preamble search and synchronizer circuit
US4807260A
(en)
*
1987-10-05
1989-02-21
Northrop Corporation
Non high frequency clock dependent Manchester biphasic decoder and comparator
JP2520697B2
(en)
*
1987-10-23
1996-07-31
アンリツ株式会社
Phase signal filter
US4912730A
(en)
*
1988-10-03
1990-03-27
Harris Corporation
High speed reception of encoded data utilizing dual phase resynchronizing clock recovery
US5023891A
(en)
1989-07-25
1991-06-11
Sf2 Corporation
Method and circuit for decoding a Manchester code signal
GB8924202D0
(en)
*
1989-10-27
1989-12-13
Ncr Co
Digital phase lock loop decoder
NL9002839A
(en)
*
1990-12-21
1992-07-16
Philips Nv
DEVICE FOR RECORDING “CLOCK RUN-IN” CODE WORDS AT THE BEGINNING OF A TRACK ON A MAGNETIC RECORD CARRIER.
US5222105A
(en)
*
1991-04-30
1993-06-22
Allied-Signal Inc.
Opto-electronic interface for decoding wave division multiplexed manchester gray coded binary signals
WO1993025023A1
(en)
*
1992-06-02
1993-12-09
Telefonaktiebolaget Lm Ericsson
Clock extraction circuit for fiber optical receivers
DE69724631D1
(en)
*
1997-12-04
2003-10-09
St Microelectronics Srl
Decoding of a biphase modulated bit stream and self-synchronizing frequency divider with non-integer ratio
DE19813965C1
(en)
1998-03-28
1999-08-19
Telefunken Microelectron
Digital data pulse transmission method
DE19848211B4
(en)
*
1998-10-20
2004-02-05
Honeywell Ag
Data transmission method
JP3179429B2
(en)
*
1999-01-29
2001-06-25
日本電気アイシーマイコンシステム株式会社
Test circuit for frequency measurement and semiconductor integrated circuit having the same
US6987824B1
(en)
*
2000-09-21
2006-01-17
International Business Machines Corporation
Method and system for clock/data recovery for self-clocked high speed interconnects
US7463682B2
(en)
*
2002-07-31
2008-12-09
Institute Of Process Engineering, Chinese Academy Of Sciences
Coding method for binary digits coding and its circuit for digits transmission
US7356106B2
(en)
*
2004-09-07
2008-04-08
Agency For Science, Technology And Research
Clock and data recovery circuit
US8598491B2
(en)
2005-11-04
2013-12-03
Lincoln Global, Inc.
GTAW welder
Family Cites Families (6)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3747067A
(en)
*
1971-08-30
1973-07-17
American Multiplex Syst Inc
Method and apparatus for data transmission
US3959601A
(en)
*
1975-06-27
1976-05-25
Ford Motor Company
Variable rate clock signal recovery circuit
DE2653968A1
(en)
*
1976-11-27
1978-06-01
Licentia Gmbh
Data correlation system for comparing parallel and serial data – has switched shift register with subtraction and adder stages
DE2719323A1
(en)
*
1977-04-27
1978-11-02
Licentia Gmbh
TDM data transmission receiver – avoids effect of temp. drift on length of bits in start combination
JPS5758444A
(en)
*
1980-09-26
1982-04-08
Fujitsu Ltd
Clock extracting system in dipulse code composite circuit
JPS5923945A
(en)
*
1982-07-30
1984-02-07
Toshiba Corp
Detecting system of radio line signal
1984
1984-10-15
JP
JP59215831A
patent/JPS6194429A/en
active
Granted
1985
1985-10-11
CA
CA000492859A
patent/CA1242029A/en
not_active
Expired
1985-10-14
EP
EP85113025A
patent/EP0178622B1/en
not_active
Expired
1985-10-14
DE
DE8585113025T
patent/DE3568925D1/en
not_active
Expired
1985-10-15
AU
AU48708/85A
patent/AU575207B2/en
not_active
Ceased
1985-10-15
US
US06/787,419
patent/US4661965A/en
not_active
Expired – Lifetime
1991
1991-02-18
SG
SG87/91A
patent/SG8791G/en
unknown
1991-03-14
HK
HK195/91A
patent/HK19591A/en
not_active
IP Right Cessation
Also Published As
Publication number
Publication date
JPH0546730B2
(en)
1993-07-14
SG8791G
(en)
1991-04-05
US4661965A
(en)
1987-04-28
AU575207B2
(en)
1988-07-21
CA1242029A
(en)
1988-09-13
HK19591A
(en)
1991-03-22
DE3568925D1
(en)
1989-04-20
JPS6194429A
(en)
1986-05-13
EP0178622B1
(en)
1989-03-15
EP0178622A3
(en)
1986-10-08
EP0178622A2
(en)
1986-04-23
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Legal Events
Date
Code
Title
Description
2001-05-17
MK14
Patent ceased section 143(a) (annual fees not paid) or expired
