AU8146991A – Circuit arrangement for the regeneration and synchronisation of a digital signal
– Google Patents
AU8146991A – Circuit arrangement for the regeneration and synchronisation of a digital signal
– Google Patents
Circuit arrangement for the regeneration and synchronisation of a digital signal
Info
Publication number
AU8146991A
AU8146991A
AU81469/91A
AU8146991A
AU8146991A
AU 8146991 A
AU8146991 A
AU 8146991A
AU 81469/91 A
AU81469/91 A
AU 81469/91A
AU 8146991 A
AU8146991 A
AU 8146991A
AU 8146991 A
AU8146991 A
AU 8146991A
Authority
AU
Australia
Prior art keywords
digital signal
circuit arrangement
synchronisation
regeneration
exhibits
Prior art date
1990-08-07
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU81469/91A
Other versions
AU643811B2
(en
Inventor
Klaus-Dieter Menk
Helmut Preisach
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1990-08-07
Filing date
1991-07-31
Publication date
1992-02-13
1991-07-31
Application filed by Alcatel NV
filed
Critical
Alcatel NV
1992-02-13
Publication of AU8146991A
publication
Critical
patent/AU8146991A/en
1993-11-25
Application granted
granted
Critical
1993-11-25
Publication of AU643811B2
publication
Critical
patent/AU643811B2/en
2011-07-31
Anticipated expiration
legal-status
Critical
Status
Ceased
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation
Abstract
A circuit arrangement for regenerating and synchronising a digital signal with a high bit repetition rate, which exhibits a series circuit of a controllable delay line and a decision logic through which the digital signal passes is proposed which is distinguished by the fact that the decision logic exhibits a sampling circuit by means of which the digital signal is sampled in the centre of its eye pattern.
AU81469/91A
1990-08-07
1991-07-31
Circuit arrangement for the regeneration and synchronisation of a digital signal
Ceased
AU643811B2
(en)
Applications Claiming Priority (2)
Application Number
Priority Date
Filing Date
Title
DE4025004A
DE4025004A1
(en)
1990-08-07
1990-08-07
CIRCUIT ARRANGEMENT FOR REGENERATING AND SYNCHRONIZING A DIGITAL SIGNAL
DE4025004
1990-08-07
Publications (2)
Publication Number
Publication Date
AU8146991A
true
AU8146991A
(en)
1992-02-13
AU643811B2
AU643811B2
(en)
1993-11-25
Family
ID=6411782
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
AU81469/91A
Ceased
AU643811B2
(en)
1990-08-07
1991-07-31
Circuit arrangement for the regeneration and synchronisation of a digital signal
Country Status (8)
Country
Link
US
(1)
US5251238A
(en)
EP
(1)
EP0471207B1
(en)
JP
(1)
JP3267642B2
(en)
AT
(1)
ATE148817T1
(en)
AU
(1)
AU643811B2
(en)
CA
(1)
CA2048480C
(en)
DE
(2)
DE4025004A1
(en)
ES
(1)
ES2099720T3
(en)
Families Citing this family (12)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
IT1265424B1
(en)
*
1993-12-22
1996-11-22
Alcatel Italia
METHOD AND CIRUITAL ARRANGEMENT FOR IMPLEMENTING THE FUNCTION OF HPA IN THE SDH EQUIPMENT
US5642386A
(en)
*
1994-06-30
1997-06-24
Massachusetts Institute Of Technology
Data sampling circuit for a burst mode communication system
US5539783A
(en)
*
1995-05-18
1996-07-23
Hazeltine Corporation
Non-coherent synchronization signal detector
US6091025A
(en)
1997-07-29
2000-07-18
Khamsin Technologies, Llc
Electrically optimized hybird “last mile” telecommunications cable system
US6684030B1
(en)
1997-07-29
2004-01-27
Khamsin Technologies, Llc
Super-ring architecture and method to support high bandwidth digital “last mile” telecommunications systems for unlimited video addressability in hub/star local loop architectures
US6239379B1
(en)
1998-07-29
2001-05-29
Khamsin Technologies Llc
Electrically optimized hybrid “last mile” telecommunications cable system
US6173009B1
(en)
*
1998-12-29
2001-01-09
Texas Instruments Incorporated
State calculation circuit for discrete linear state space model
US6307878B1
(en)
*
1999-06-03
2001-10-23
Dspc Technologies Ltd
Cellular telephony searcher
GB0012813D0
(en)
*
2000-05-25
2000-07-19
Phoenix Vlsi Consultants Ltd
Parallel data interface
US6930628B2
(en)
*
2001-05-03
2005-08-16
Coreoptics, Inc.
Amplitude detection for controlling the decision instant for sampling as a data flow
US20040239376A1
(en)
*
2003-05-30
2004-12-02
Haeffele Jeffrey John
Continuously retraining sampler and method of use thereof
EP2603743B1
(en)
2010-08-11
2019-06-19
Close Comfort Pty Ltd
Localised personal air conditioning
Family Cites Families (10)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
JPS5270707A
(en)
*
1975-12-09
1977-06-13
Nec Corp
Automatic phase control system
US4435823A
(en)
*
1980-12-29
1984-03-06
Harris Corporation
Adaptive equalizer capable of linear and nonlinear weighting
US4604582A
(en)
*
1985-01-04
1986-08-05
Lockheed Electronics Company, Inc.
Digital phase correlator
US4769816A
(en)
*
1985-11-08
1988-09-06
Raytheon Company
Qpsk demodulator
DE3543392A1
(en)
*
1985-12-07
1987-06-25
Standard Elektrik Lorenz Ag
CIRCUIT ARRANGEMENT FOR REGENERATING AND SYNCHRONIZING A DIGITAL SIGNAL
CA1306504C
(en)
*
1986-03-05
1992-08-18
Nec Corporation
Noise detection by sampling digital baseband signal at eye openings
US4694468A
(en)
*
1986-04-25
1987-09-15
Eastman Kodak Company
Apparatus useful in channel equalization adjustment
US4789994A
(en)
*
1987-08-12
1988-12-06
American Telephone And Telegraph Company, At&T Bell Laboratories
Adaptive equalizer using precursor error signal for convergence control
GB8903567D0
(en)
*
1989-02-16
1989-04-05
British Telecomm
An optical network
JP2508579B2
(en)
*
1993-05-14
1996-06-19
日本電気株式会社
Method of manufacturing array type infrared detector
1990
1990-08-07
DE
DE4025004A
patent/DE4025004A1/en
not_active
Withdrawn
1991
1991-07-20
ES
ES91112168T
patent/ES2099720T3/en
not_active
Expired – Lifetime
1991-07-20
AT
AT91112168T
patent/ATE148817T1/en
not_active
IP Right Cessation
1991-07-20
DE
DE59108526T
patent/DE59108526D1/en
not_active
Expired – Fee Related
1991-07-20
EP
EP91112168A
patent/EP0471207B1/en
not_active
Expired – Lifetime
1991-07-31
AU
AU81469/91A
patent/AU643811B2/en
not_active
Ceased
1991-08-02
JP
JP19434191A
patent/JP3267642B2/en
not_active
Expired – Fee Related
1991-08-06
CA
CA002048480A
patent/CA2048480C/en
not_active
Expired – Fee Related
1991-08-07
US
US07/741,682
patent/US5251238A/en
not_active
Expired – Lifetime
Also Published As
Publication number
Publication date
JP3267642B2
(en)
2002-03-18
DE4025004A1
(en)
1992-02-13
EP0471207A3
(en)
1993-03-17
AU643811B2
(en)
1993-11-25
ATE148817T1
(en)
1997-02-15
JPH04234224A
(en)
1992-08-21
DE59108526D1
(en)
1997-03-20
US5251238A
(en)
1993-10-05
EP0471207A2
(en)
1992-02-19
CA2048480A1
(en)
1992-02-08
CA2048480C
(en)
1998-04-07
EP0471207B1
(en)
1997-02-05
ES2099720T3
(en)
1997-06-01
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