GB1078798A

GB1078798A – Improvements in or relating to field effect transistor devices
– Google Patents

GB1078798A – Improvements in or relating to field effect transistor devices
– Google Patents
Improvements in or relating to field effect transistor devices

Info

Publication number
GB1078798A

GB1078798A
GB12775/66A
GB1277566A
GB1078798A
GB 1078798 A
GB1078798 A
GB 1078798A
GB 12775/66 A
GB12775/66 A
GB 12775/66A
GB 1277566 A
GB1277566 A
GB 1277566A
GB 1078798 A
GB1078798 A
GB 1078798A
Authority
GB
United Kingdom
Prior art keywords
region
type
layer
regions
source
Prior art date
1965-04-19
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB12775/66A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Teledyne Inc

Original Assignee
Teledyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1965-04-19
Filing date
1966-03-23
Publication date
1967-08-09

1966-03-23
Application filed by Teledyne Inc
filed
Critical
Teledyne Inc

1967-08-09
Publication of GB1078798A
publication
Critical
patent/GB1078798A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

B—PERFORMING OPERATIONS; TRANSPORTING

B24—GRINDING; POLISHING

B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS

B24B37/00—Lapping machines or devices; Accessories

B24B37/005—Control means for lapping machines or devices

B24B37/013—Devices or means for detecting lapping completion

H—ELECTRICITY

H01—ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof

H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate

H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology

H01L21/8232—Field-effect technology

H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type

H01L21/8238—Complementary field-effect transistors, e.g. CMOS

H—ELECTRICITY

H01—ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10

H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S148/00—Metal treatment

Y10S148/037—Diffusion-deposition

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S148/00—Metal treatment

Y10S148/053—Field effect transistors fets

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S148/00—Metal treatment

Y10S148/098—Layer conversion

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S148/00—Metal treatment

Y10S148/151—Simultaneous diffusion

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC

Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Y10S148/00—Metal treatment

Y10S148/162—Testing steps

Abstract

1,078,798. Semi-conductor devices. TELEDYNE Inc. March 23, 1966 [April 19, 1965], No. 12775/66. Heading H1K. In a method of producing an insulated gate FET, a high impurity concentration region formed on one surface of a substrate of the same conductivity type is covered with a layer of semi-conductor material of the other conductivity type into which it is then diffused, the extent of the diffusion being monitored by measuring the resistance between highly doped regions formed on the surface of the layer. The method is used to produce a pair of complementary insulated gate FETs (11, 12) by forming P+ type region (181) in a P-type wafer (20), Fig. 3 (not shown), epitaxially depositing an N-type layer (10), Fig. 4 (not shown), forming N + type source and drain regions (16a, 17a) and P+ type source and drain regions (16b, 17b) using an oxide photo-masking technique, Fig. 6 (not shown), and heating to cause region (181) to diffuse into layer (10) to form lightly doped region (18). The resistance between two probes (26, 27) applied to regions (16a, 17a) is monitored, Fig. 7 (not shown), and the diffusion is terminated when region (18) just encompasses regions (16a, 17a), indicated by a change from an ohmic characteristic (30) to a rectifying characteristic (31), Fig. 8 (not shown). Source and drain electrodes are provided and gate electrodes 13a, 13b are formed on silicon oxide layer 15, Fig. 2. Region (181) may be doped with boron introduced by heating the wafer in an impurity-containing atmosphere.

GB12775/66A
1965-04-19
1966-03-23
Improvements in or relating to field effect transistor devices

Expired

GB1078798A
(en)

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

US448953A

US3340598A
(en)

1965-04-19
1965-04-19
Method of making field effect transistor device

Publications (1)

Publication Number
Publication Date

GB1078798A
true

GB1078798A
(en)

1967-08-09

Family
ID=23782292
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB12775/66A
Expired

GB1078798A
(en)

1965-04-19
1966-03-23
Improvements in or relating to field effect transistor devices

Country Status (3)

Country
Link

US
(1)

US3340598A
(en)

DE
(1)

DE1564829C3
(en)

GB
(1)

GB1078798A
(en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

NL6606083A
(en)

*

1965-06-22
1967-11-06
Philips Nv

US3518509A
(en)

*

1966-06-17
1970-06-30
Int Standard Electric Corp
Complementary field-effect transistors on common substrate by multiple epitaxy techniques

US3440502A
(en)

*

1966-07-05
1969-04-22
Westinghouse Electric Corp
Insulated gate field effect transistor structure with reduced current leakage

US3469155A
(en)

*

1966-09-23
1969-09-23
Westinghouse Electric Corp
Punch-through means integrated with mos type devices for protection against insulation layer breakdown

GB1173150A
(en)

*

1966-12-13
1969-12-03
Associated Semiconductor Mft
Improvements in Insulated Gate Field Effect Transistors

US3479233A
(en)

*

1967-01-16
1969-11-18
Ibm
Method for simultaneously forming a buried layer and surface connection in semiconductor devices

US3447046A
(en)

*

1967-05-31
1969-05-27
Westinghouse Electric Corp
Integrated complementary mos type transistor structure and method of making same

US3493824A
(en)

*

1967-08-31
1970-02-03
Gen Telephone & Elect
Insulated-gate field effect transistors utilizing a high resistivity substrate

US3999213A
(en)

*

1972-04-14
1976-12-21
U.S. Philips Corporation
Semiconductor device and method of manufacturing the device

US3861968A
(en)

*

1972-06-19
1975-01-21
Ibm
Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition

US4028717A
(en)

*

1975-09-22
1977-06-07
Ibm Corporation
Field effect transistor having improved threshold stability

US4060432A
(en)

*

1975-10-20
1977-11-29
General Electric Co.
Method for manufacturing nuclear radiation detector with deep diffused junction

US4203126A
(en)

*

1975-11-13
1980-05-13
Siliconix, Inc.
CMOS structure and method utilizing retarded electric field for minimum latch-up

US4138280A
(en)

*

1978-02-02
1979-02-06
International Rectifier Corporation
Method of manufacture of zener diodes

JP2985796B2
(en)

*

1996-09-30
1999-12-06
日本電気株式会社

Semiconductor device

1965

1965-04-19
US
US448953A
patent/US3340598A/en
not_active
Expired – Lifetime

1966

1966-03-23
GB
GB12775/66A
patent/GB1078798A/en
not_active
Expired

1966-04-07
DE
DE1564829A
patent/DE1564829C3/en
not_active
Expired

Also Published As

Publication number
Publication date

DE1564829C3
(en)

1975-07-03

DE1564829B2
(en)

1974-11-14

US3340598A
(en)

1967-09-12

DE1564829A1
(en)

1969-09-25

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