GB1135992A

GB1135992A – Improvements in and relating to integrated circuit logic matrices
– Google Patents

GB1135992A – Improvements in and relating to integrated circuit logic matrices
– Google Patents
Improvements in and relating to integrated circuit logic matrices

Info

Publication number
GB1135992A

GB1135992A
GB4653767A
GB4653767A
GB1135992A
GB 1135992 A
GB1135992 A
GB 1135992A
GB 4653767 A
GB4653767 A
GB 4653767A
GB 4653767 A
GB4653767 A
GB 4653767A
GB 1135992 A
GB1135992 A
GB 1135992A
Authority
GB
United Kingdom
Prior art keywords
conductors
input
output
conductor
fuses
Prior art date
1966-10-20
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB4653767A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Standard Electric Corp

Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1966-10-20
Filing date
1967-10-12
Publication date
1968-12-11

1967-10-12
Application filed by International Standard Electric Corp
filed
Critical
International Standard Electric Corp

1968-12-11
Publication of GB1135992A
publication
Critical
patent/GB1135992A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

H—ELECTRICITY

H03—ELECTRONIC CIRCUITRY

H03K—PULSE TECHNIQUE

H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components

H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components

H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form

H03K19/1778—Structural details for adapting physical parameters

G—PHYSICS

G11—INFORMATION STORAGE

G11C—STATIC STORES

G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards

G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM

G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links

H—ELECTRICITY

H01—ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10

H01L23/00—Details of semiconductor or other solid state devices

H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames

H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections

H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive

H—ELECTRICITY

H01—ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10

H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00

H01L2924/0001—Technical content checked by a classifier

H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

1,135,992. Integrated circuits. INTERNATIONAL STANDARD ELECTRIC CORP. 12 Oct., 1967 [20 Oct., 1966], No. 46537/67. Heading H1K. In an integrated circuit logic matrix the input conductors are provided in pairs, e.g. ce1, ce2, the conductors of each pair being connected to each output conductor, e.g. cs1, by a combination of two fuses fs1, fs2 and a coupling component such as a diode cl1. The output of the diode cl1 is connected to the output conductor cs1 while the input of the diode is connected through one fuse fs1 to the input conductor ce1 and through the second fuse fs2 to the other input conductor ce2 of the pair. One or both of the fuses in each pair may be blown prior to operation of the matrix, dependent upon the desired circuit function. In the embodiment the diodes cl1 &c. are all formed in a common Si body provided with deposited A1 conductors ce1, ce2, cs1 &c., and the fuses fs1, fs2 &c. comprise portions of conductors having reduced cross-section which may be melted as desired by relatively high currents applied between appropriate pairs of input and output conductors.

GB4653767A
1966-10-20
1967-10-12
Improvements in and relating to integrated circuit logic matrices

Expired

GB1135992A
(en)

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

FR80751A

FR1503968A
(en)

1966-10-20
1966-10-20

Improvements to integrated logic circuit matrices

Publications (1)

Publication Number
Publication Date

GB1135992A
true

GB1135992A
(en)

1968-12-11

Family
ID=8619541
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB4653767A
Expired

GB1135992A
(en)

1966-10-20
1967-10-12
Improvements in and relating to integrated circuit logic matrices

Country Status (2)

Country
Link

FR
(1)

FR1503968A
(en)

GB
(1)

GB1135992A
(en)

Cited By (6)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

FR2489580A1
(en)

*

1980-08-26
1982-03-05
Gen Electric

PROGRAMMABLE MEMORY, INTEGRATED CIRCUIT COMPRISING SUCH MEMORY, SHIFT REGISTER, AND PROGRAMMING METHOD

EP0339534A2
(en)

*

1988-04-25
1989-11-02
Quick Technologies Ltd.
Customizable semiconductor devices

US5260597A
(en)

*

1988-07-21
1993-11-09
Quick Technologies Ltd.
Routing structure for a customizable integrated circuit

US5545904A
(en)

*

1986-01-17
1996-08-13
Quick Technologies Ltd.
Personalizable gate array devices

EP1011145A2
(en)

*

1988-04-25
2000-06-21
Quick Technologies Ltd.
Customizable semiconductor devices

US6459136B1
(en)

2000-11-07
2002-10-01
Chip Express (Israel) Ltd.
Single metal programmability in a customizable integrated circuit device

1966

1966-10-20
FR
FR80751A
patent/FR1503968A/en
not_active
Expired

1967

1967-10-12
GB
GB4653767A
patent/GB1135992A/en
not_active
Expired

Cited By (9)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

FR2489580A1
(en)

*

1980-08-26
1982-03-05
Gen Electric

PROGRAMMABLE MEMORY, INTEGRATED CIRCUIT COMPRISING SUCH MEMORY, SHIFT REGISTER, AND PROGRAMMING METHOD

US5545904A
(en)

*

1986-01-17
1996-08-13
Quick Technologies Ltd.
Personalizable gate array devices

EP0339534A2
(en)

*

1988-04-25
1989-11-02
Quick Technologies Ltd.
Customizable semiconductor devices

EP0339534A3
(en)

*

1988-04-25
1990-11-07
Quick Technologies Ltd.
Customizable semiconductor devices

EP1011145A2
(en)

*

1988-04-25
2000-06-21
Quick Technologies Ltd.
Customizable semiconductor devices

EP1011145A3
(en)

*

1988-04-25
2000-12-20
Quick Technologies Ltd.
Customizable semiconductor devices

US5260597A
(en)

*

1988-07-21
1993-11-09
Quick Technologies Ltd.
Routing structure for a customizable integrated circuit

US6459136B1
(en)

2000-11-07
2002-10-01
Chip Express (Israel) Ltd.
Single metal programmability in a customizable integrated circuit device

US6903390B2
(en)

2000-11-07
2005-06-07
Chip Express (Israel) Ltd.
Single metal programmability in a customizable integrated circuit device

Also Published As

Publication number
Publication date

FR1503968A
(en)

1967-12-01

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