GB1152413A – Apparatus For Use In Error Detection Systems
– Google Patents
GB1152413A – Apparatus For Use In Error Detection Systems
– Google Patents
Apparatus For Use In Error Detection Systems
Info
Publication number
GB1152413A
GB1152413A
GB25705/66A
GB2570566A
GB1152413A
GB 1152413 A
GB1152413 A
GB 1152413A
GB 25705/66 A
GB25705/66 A
GB 25705/66A
GB 2570566 A
GB2570566 A
GB 2570566A
GB 1152413 A
GB1152413 A
GB 1152413A
Authority
GB
United Kingdom
Prior art keywords
word
bit
parity
gate
gates
Prior art date
1965-07-06
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB25705/66A
Inventor
Alfons Reszka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Teletype Corp
Original Assignee
Teletype Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1965-07-06
Filing date
1966-06-09
Publication date
1969-05-21
1966-06-09
Application filed by Teletype Corp
filed
Critical
Teletype Corp
1969-05-21
Publication of GB1152413A
publication
Critical
patent/GB1152413A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
238000001514
detection method
Methods
0.000
title
1
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L1/00—Arrangements for detecting or preventing errors in the information received
H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
Abstract
1,152,413. Apparatus for providing parity checks. TELETYPE CORP. 9 June, 1966 [6 July, 1965], No. 25705/66. Heading G4A. Apparatus for generating a parity check signal comprises means producing a signal indicative of odd or even ” 1’s ” in a word, second means for providing an output signal indicative of odd or even ” 1’s ” in a predetermined number of words each of which may contribute not more than one of the ” 1’s ” to the second count, and third means responsive to the two signals to produce a parity check signal if the two signals differ. As shown, an eight-bit word is applied to a set of EXCLUSIVE OR gates 31a-31d, 32a, 32b, 33 which provide an output if an odd number of ” 1’s ” exist in the word. The output of gate 33 is applied to an EXCLUSIVE OR gate 34. The eight bits are also applied to AND gates 30a-30h respectively enabled by an ADD CHARACTER pulse. ” 1’s ” at the appropriate gate act to change the state of a bi-stable element 38a-38h which thus serve to add modulo 2 the bits supplied thereto. After the summation a shift pulse is applied to line 35 and the data in each bi-stable element is shifted one place to the right causing the parity bits stored in each bi-stable element to be carried by spiral addition, i.e. adding bit 1 of word 1 and bit 2 of word 2 and bit 3 of word 3 &c. The time sequence is such that the data word is first applied to EXCLUSIVE OR gates 31-33 to provide a vertical parity check bit. This is applied to gate 34 and compared with the check bit of the previous eight characters. A parity bit is then transmitted to be added to a character or compared with a received parity bit. The SHIFT pulse is then applied and then the ADD CHARACTER. The cycle of operation is then repeated for the next word.
GB25705/66A
1965-07-06
1966-06-09
Apparatus For Use In Error Detection Systems
Expired
GB1152413A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
US46941265A
1965-07-06
1965-07-06
Publications (1)
Publication Number
Publication Date
GB1152413A
true
GB1152413A
(en)
1969-05-21
Family
ID=23863687
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB25705/66A
Expired
GB1152413A
(en)
1965-07-06
1966-06-09
Apparatus For Use In Error Detection Systems
Country Status (7)
Country
Link
US
(1)
US3505643A
(en)
BE
(1)
BE683635A
(en)
CH
(1)
CH449692A
(en)
DE
(2)
DE1251366B
(en)
GB
(1)
GB1152413A
(en)
NL
(1)
NL6609223A
(en)
SE
(1)
SE306955B
(en)
Family Cites Families (6)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US2977047A
(en)
*
1957-12-13
1961-03-28
Honeywell Regulator Co
Error detecting and correcting apparatus
US3024444A
(en)
*
1958-12-15
1962-03-06
Collins Radio Co
Error detection by shift register parity system
US3183483A
(en)
*
1961-01-16
1965-05-11
Sperry Rand Corp
Error detection apparatus
US3200374A
(en)
*
1962-03-27
1965-08-10
Melpar Inc
Multi-dimension parity check system
US3234510A
(en)
*
1962-04-25
1966-02-08
Teletype Corp
Spiral error detection circuit for telegraph systems
US3387261A
(en)
*
1965-02-05
1968-06-04
Honeywell Inc
Circuit arrangement for detection and correction of errors occurring in the transmission of digital data
0
DE
DENDAT1251365D
patent/DE1251365B/en
active
Pending
DE
DENDAT1251366D
patent/DE1251366B/de
active
Pending
1965
1965-07-06
US
US469412A
patent/US3505643A/en
not_active
Expired – Lifetime
1966
1966-06-09
GB
GB25705/66A
patent/GB1152413A/en
not_active
Expired
1966-06-24
CH
CH916566A
patent/CH449692A/en
unknown
1966-07-01
NL
NL6609223A
patent/NL6609223A/xx
unknown
1966-07-04
SE
SE9117/66A
patent/SE306955B/xx
unknown
1966-07-04
BE
BE683635D
patent/BE683635A/xx
unknown
Also Published As
Publication number
Publication date
DE1251366B
(en)
BE683635A
(en)
1966-12-16
US3505643A
(en)
1970-04-07
SE306955B
(en)
1968-12-16
DE1251365B
(en)
1967-10-05
NL6609223A
(en)
1967-01-09
CH449692A
(en)
1968-01-15
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Legal Events
Date
Code
Title
Description
1969-10-01
PS
Patent sealed [section 19, patents act 1949]
1976-01-09
PLNP
Patent lapsed through nonpayment of renewal fees