GB1232621A – – Google Patents
GB1232621A – – Google Patents
Info
Publication number
GB1232621A
GB1232621A
GB750768A
GB1232621DA
GB1232621A
GB 1232621 A
GB1232621 A
GB 1232621A
GB 750768 A
GB750768 A
GB 750768A
GB 1232621D A
GB1232621D A
GB 1232621DA
GB 1232621 A
GB1232621 A
GB 1232621A
Authority
GB
United Kingdom
Prior art keywords
glass
ceramic
conductors
holes
heated
Prior art date
1968-02-15
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB750768A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1968-02-15
Filing date
1968-02-15
Publication date
1971-05-19
1968-02-15
Application filed
filed
Critical
1971-05-19
Publication of GB1232621A
publication
Critical
patent/GB1232621A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, “first-level” interconnects; Manufacturing methods related thereto
H01L24/42—Wire connectors; Manufacturing methods related thereto
H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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H01L23/00—Details of semiconductor or other solid state devices
H01L23/12—Mountings, e.g. non-detachable insulating substrates
H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L23/142—Metallic substrates having insulating layers
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H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
H05K1/00—Printed circuits
H05K1/02—Details
H05K1/03—Use of materials for the substrate
H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
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H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
H10N97/00—Electric solid-state thin-film or thick-film devices, not otherwise provided for
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H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
H01L2224/45124—Aluminium (Al) as principal constituent
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H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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H01L2224/481—Disposition
H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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H01L2224/481—Disposition
H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L2224/48235—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
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H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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H01L2224/48505—Material at the bonding interface
H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
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H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
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H01L2924/14—Integrated circuits
Abstract
1,232,621. Glass-ceramic-metal structures; compositions. ENGLISH ELECTRIC CO. Ltd. 14 Feb., 1969 [15 Feb., 1968], No. 7507/68. Heading C1M. [Also in Division H1] An electrical component panel comprises a glass-ceramic insulated metal plate 10 for dissipating heat carrying a multilayer printed circuit. Copper plate 10 having holes 20, 21 formed therein in which are fused glass-ceramic compacts 22 carrying copper wires 23 is coated in the regions 10B, 10C with layers of ceramic glass insulation 12, 14. After forming through connections 24 by plating through etched holes in the layers 12, 14, edge connectors 11, voltage supply plane 13 and conductors 15 are formed by screen printing. Following the deposition of ceramic glass layer 16 and the formation of holes therethrough conductors 17 are deposited by screen printing some of the holes passing through the holes in layer 16 to form connections with conductors 15. Integrated circuit chips 19 are finally bonded to pads 15A formed simultaneously with the conductors 15. Section 10A of the metal plate is left uncoated and is clamped to a duct 30 carrying cooling fluid. The insulation layers may be made as separate thin glass sheets which are appropriately drilled and bonded to the substrate and the conductors may be formed by vacuum evaporation or by bonding thin metal foils to the assembly and etching. The chips may be fixed directly to the substrate. Ceramic-glass compositions.-The tubular contacts 22 have a composition SiO 2 68À3%, Li 2 O 9À7%, ZnO 19À4% and P 2 O 5 2À6%. After firing to 1000 C. in an atmosphere of nitrogen the assembly is cooled rapidly to 500 C., heated at 5 C. per min. to 800 C. and then cooled to room temperature in nitrogen atmosphere. Insulation layers 12, 14 of composition by weight SiO 2 54À2%, B 2 O 3 5À0%, Li 2 O 9À0%, Na 2 O 5À0%, ZnO 24.4% and P 2 O 5 2À3% are coated in a methylated spirit suspension, fired at a temperature of 950 C., held at a temperature of 500 C. for one hour, heated at 5 C. per min. to 750 C. held at this temperature for 1 hour and cooled to room temperature all in a nitrogen atmosphere. The insulating layer 16 having a composition by weight of SiO 2 36À4%, B 2 O 3 18À8%, Na 2 O 12À5%, K 2 O 6À3% and BaO 26À0% is screen printed, heated to 500 C. in air and then heated to 750 C. in nitrogen for 15 minutes.
GB750768A
1968-02-15
1968-02-15
Expired
GB1232621A
(en)
Applications Claiming Priority (1)
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Priority Date
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Title
GB750768
1968-02-15
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GB1232621A
true
GB1232621A
(en)
1971-05-19
Family
ID=9834448
Family Applications (1)
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Title
Priority Date
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GB750768A
Expired
GB1232621A
(en)
1968-02-15
1968-02-15
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DE
(1)
DE1907567A1
(en)
FR
(1)
FR2001970A1
(en)
GB
(1)
GB1232621A
(en)
NL
(1)
NL6902359A
(en)
Cited By (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4570337A
(en)
*
1982-04-19
1986-02-18
Olin Corporation
Method of assembling a chip carrier
US4687540A
(en)
*
1985-12-20
1987-08-18
Olin Corporation
Method of manufacturing glass capacitors and resulting product
US4696851A
(en)
*
1985-03-25
1987-09-29
Olin Corporation
Hybrid and multi-layer circuitry
US4712161A
(en)
*
1985-03-25
1987-12-08
Olin Corporation
Hybrid and multi-layer circuitry
US4725333A
(en)
*
1985-12-20
1988-02-16
Olin Corporation
Metal-glass laminate and process for producing same
US4821151A
(en)
*
1985-12-20
1989-04-11
Olin Corporation
Hermetically sealed package
US4840654A
(en)
*
1985-03-04
1989-06-20
Olin Corporation
Method for making multi-layer and pin grid arrays
Families Citing this family (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4074342A
(en)
*
1974-12-20
1978-02-14
International Business Machines Corporation
Electrical package for lsi devices and assembly process therefor
GB2111312A
(en)
*
1981-11-04
1983-06-29
Philips Electronic Associated
Substrates for electrical circuits
US5014159A
(en)
*
1982-04-19
1991-05-07
Olin Corporation
Semiconductor package
US4866571A
(en)
*
1982-06-21
1989-09-12
Olin Corporation
Semiconductor package
EP0139029A1
(en)
*
1983-10-19
1985-05-02
Olin Corporation
Improved semiconductor package
US4862323A
(en)
*
1984-04-12
1989-08-29
Olin Corporation
Chip carrier
US4853491A
(en)
*
1984-10-03
1989-08-01
Olin Corporation
Chip carrier
1968
1968-02-15
GB
GB750768A
patent/GB1232621A/en
not_active
Expired
1969
1969-02-14
FR
FR6903687A
patent/FR2001970A1/fr
not_active
Withdrawn
1969-02-14
NL
NL6902359A
patent/NL6902359A/xx
unknown
1969-02-14
DE
DE19691907567
patent/DE1907567A1/en
active
Pending
Cited By (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4570337A
(en)
*
1982-04-19
1986-02-18
Olin Corporation
Method of assembling a chip carrier
US4840654A
(en)
*
1985-03-04
1989-06-20
Olin Corporation
Method for making multi-layer and pin grid arrays
US4696851A
(en)
*
1985-03-25
1987-09-29
Olin Corporation
Hybrid and multi-layer circuitry
US4712161A
(en)
*
1985-03-25
1987-12-08
Olin Corporation
Hybrid and multi-layer circuitry
US4687540A
(en)
*
1985-12-20
1987-08-18
Olin Corporation
Method of manufacturing glass capacitors and resulting product
US4725333A
(en)
*
1985-12-20
1988-02-16
Olin Corporation
Metal-glass laminate and process for producing same
US4821151A
(en)
*
1985-12-20
1989-04-11
Olin Corporation
Hermetically sealed package
Also Published As
Publication number
Publication date
DE1907567A1
(en)
1969-09-18
FR2001970A1
(en)
1969-10-03
NL6902359A
(en)
1969-08-19
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Legal Events
Date
Code
Title
Description
1971-09-29
PS
Patent sealed [section 19, patents act 1949]
1976-09-08
PLNP
Patent lapsed through nonpayment of renewal fees
