GB1247343A

GB1247343A – Transfer function analysis
– Google Patents

GB1247343A – Transfer function analysis
– Google Patents
Transfer function analysis

Info

Publication number
GB1247343A

GB1247343A
GB55184/67A
GB5518467A
GB1247343A
GB 1247343 A
GB1247343 A
GB 1247343A
GB 55184/67 A
GB55184/67 A
GB 55184/67A
GB 5518467 A
GB5518467 A
GB 5518467A
GB 1247343 A
GB1247343 A
GB 1247343A
Authority
GB
United Kingdom
Prior art keywords
signal
output
signals
cos
high frequency
Prior art date
1967-12-05
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB55184/67A
Inventor
Anthony John Ley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Gemalto Terminals Ltd

Original Assignee
Solartron Electronic Group Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1967-12-05
Filing date
1967-12-05
Publication date
1971-09-22

1967-12-05
Application filed by Solartron Electronic Group Ltd
filed
Critical
Solartron Electronic Group Ltd

1967-12-05
Priority to GB55184/67A
priority
Critical
patent/GB1247343A/en

1968-12-02
Priority to US780448A
priority
patent/US3586846A/en

1968-12-04
Priority to DE1812503A
priority
patent/DE1812503C3/en

1968-12-05
Priority to FR1602147D
priority
patent/FR1602147A/fr

1971-09-22
Publication of GB1247343A
publication
Critical
patent/GB1247343A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G06—COMPUTING; CALCULATING OR COUNTING

G06G—ANALOGUE COMPUTERS

G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities

G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers

G06G7/19—Arrangements for performing computing operations, e.g. operational amplifiers for forming integrals of products, e.g. Fourier integrals, Laplace integrals, correlation integrals; for analysis or synthesis of functions using orthogonal functions

G06G7/1921—Arrangements for performing computing operations, e.g. operational amplifiers for forming integrals of products, e.g. Fourier integrals, Laplace integrals, correlation integrals; for analysis or synthesis of functions using orthogonal functions for forming Fourier integrals, harmonic analysis and synthesis

G—PHYSICS

G01—MEASURING; TESTING

G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES

G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom

G01R27/28—Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response

Abstract

1,247,343. Multiplying circuits. SOLARTRON ELECTRONIC GROUP Ltd. 4 Dec., 1968 [5 Dec., 1967], No. 55184/67. Heading G4G. [Also in Division G1] In order to test the response of a system (e.g. a servo system, electrical component, manufacturing process) to an input signal of relatively high frequency # H , using a correlator adapted to operate at relatively lower frequency, a first signal at the high frequency # H and two second signals at a relatively lower frequency # L differing in phase are generated. From these signals a third signal having a frequency equal to the sum or difference of the high frequency # H and the relatively lower frequency # L is generated. One of the first and third signals is applied to the system under test. The output signal from the system is multiplied by the other of the first and third signals and the thus formed multiplied signal is compared in the correlator with the two second signals of the lower frequency # L . The resultant signals from the correlator represent the response of the system to a high frequency signal. The arrangement enables systems to be tested at frequencies up to 1 MHz. using a correlator operating up to say 1500 Hz. In one arrangement (Fig. 3) a high frequency oscillator 20 provides two 90 degree phase displaced output signals sin # H t, cos # H t. These are respectively multiplied at 31, 32 with corresponding 90 degrees phase displaced outputs from a low frequency oscillator 30, and the outputs from the two multipliers subtracted in the unit 33. The resultant output from this will be proportional to cos (# H + # L )t and is applied to the system under test. This modifies it to provide an output R cos {(# H +# L )t+#} (1) where R and # depend on the test system, and this output signal is multiplied by a high frequency signal component, cos # H t, to provide an output R/ 2 {cos ((2# H + # L )t + # + cos (# L t + #)} (2) This signal is applied to the correlator 40 which has two paths (Fig. 1, not shown), in one of which the output (2) is multiplied by cos # L t and in the other by sin # L t, the resultant products being integrated. Because the correlator responds only to low frequencies, it processes only the part R/ 2 cos (# L t + #) of the output (2), to provide output signals from its two channels R/ 2 and #, which are applied to appropriate displays. The multipliers 31, 32 may be any non-linear arrangement, since any harmonics will be rejected by the correlator. In particular they may be switches operated by square waves at the low frequency. The multiplier 24 may receive any signal cos (# H t+#) since # will appear in the display merely as a constant. The high frequency oscillator 20 is frequency locked to the low frequency oscillator by frequency dividing down an output from it, by, say, 1000, subtracting a signal from the low frequency oscillator and using the resultant to control the high frequency oscillator (Fig. 5, not shown). In an alternative system the high frequency signal is applied directly to the system under test and the multiplied and subtracted signal (see expression (1)) applied to the multiplier 34 (see Fig. 4, not shown). In a suitable arrangement for the multipliers 31, 32 (Fig. 6) the high frequency signals are applied both normally and inverted to the drain electrodes of field effect transistors while corresponding low frequency signals are applied to the control electrodes. The source electrodes of each pair receiving normal and inverted inputs are connected together and to a respective input of a differential amplifier forming the adder 33. In a suitable circuit for the multiplier 34 (Fig. 7), the multiplier signal (# H + # L )t (Fig. 4 embodiment) is applied to the emitters of a longtailed pair 71, 72 and inverted to the emitters of a second pair 73, 74. The signal from the system under test is applied to the base of transistors 72, 73 in these pairs and the outputs from the collectors 71, 73 are added to provide the multiplier output.

GB55184/67A
1967-12-05
1967-12-05
Transfer function analysis

Expired

GB1247343A
(en)

Priority Applications (4)

Application Number
Priority Date
Filing Date
Title

GB55184/67A

GB1247343A
(en)

1967-12-05
1967-12-05
Transfer function analysis

US780448A

US3586846A
(en)

1967-12-05
1968-12-02
Transfer function analysis

DE1812503A

DE1812503C3
(en)

1967-12-05
1968-12-04

Method for checking the response of a system to an input signal and device for performing the method

FR1602147D

FR1602147A
(en)

1967-12-05
1968-12-05

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

GB55184/67A

GB1247343A
(en)

1967-12-05
1967-12-05
Transfer function analysis

Publications (1)

Publication Number
Publication Date

GB1247343A
true

GB1247343A
(en)

1971-09-22

Family
ID=10473206
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB55184/67A
Expired

GB1247343A
(en)

1967-12-05
1967-12-05
Transfer function analysis

Country Status (4)

Country
Link

US
(1)

US3586846A
(en)

DE
(1)

DE1812503C3
(en)

FR
(1)

FR1602147A
(en)

GB
(1)

GB1247343A
(en)

Cited By (2)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

GB2306012A
(en)

*

1995-10-30
1997-04-23
British Broadcasting Corp
Method and apparatus for determining the response of a system containing a finite impulse response circuit coupled with a feedback loop

US7627287B2
(en)

2005-05-20
2009-12-01
British Broadcasting Corporation
On-channel repeater

Families Citing this family (11)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US4067060A
(en)

*

1976-07-06
1978-01-03
Canadian Patents And Development Limited
Transfer function measurement

US4081858A
(en)

*

1976-08-19
1978-03-28
California Institute Of Technology
System for computing wiener kernels

AU554337B2
(en)

*

1981-03-11
1986-08-14
Metalogic Control Ltd.
Adaptive control of a dynamic system

DE3330233A1
(en)

*

1983-08-22
1985-03-21
Deutsche Forschungs- und Versuchsanstalt für Luft- und Raumfahrt e.V., 5000 Köln

METHOD AND DEVICE FOR ADJUSTING THE PID BEHAVIOR OF REGULATOR COMPENSATION NETWORKS, ESPECIALLY IN HYDROPULSE MACHINES

GB2145888B
(en)

*

1983-08-24
1986-06-18
Ferranti Plc
Testing the transfer function linearity of analogue input circuits

US4713782A
(en)

*

1984-08-23
1987-12-15
Hewlett-Packard Company
Method and apparatus for measuring a transfer function

US4654808A
(en)

*

1984-08-23
1987-03-31
Hewlett-Packard Company
Noise corrected pole and zero analyzer

US4658367A
(en)

*

1984-08-23
1987-04-14
Hewlett-Packard Company
Noise corrected pole and zero analyzer

US4654809A
(en)

*

1984-08-23
1987-03-31
Hewlett-Packard Company
Noise corrected pole and zero analyzer

FR3036806B1
(en)

*

2015-05-26
2017-06-16
Commissariat Energie Atomique

METHOD AND ANALOGIC DEVICE FOR MEASURING A PHASE OF A SINUSOIDAL SIGNAL

FR3036807B1
(en)

*

2015-05-26
2018-11-09
Commissariat A L’energie Atomique Et Aux Energies Alternatives

DEVICE AND DIGITAL METHOD FOR MEASURING A PHASE OF A SINUSOIDAL SIGNAL

1967

1967-12-05
GB
GB55184/67A
patent/GB1247343A/en
not_active
Expired

1968

1968-12-02
US
US780448A
patent/US3586846A/en
not_active
Expired – Lifetime

1968-12-04
DE
DE1812503A
patent/DE1812503C3/en
not_active
Expired

1968-12-05
FR
FR1602147D
patent/FR1602147A/fr
not_active
Expired

Cited By (3)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

GB2306012A
(en)

*

1995-10-30
1997-04-23
British Broadcasting Corp
Method and apparatus for determining the response of a system containing a finite impulse response circuit coupled with a feedback loop

GB2306012B
(en)

*

1995-10-30
2000-03-22
British Broadcasting Corp
Method and apparatus for determining the response of a system containing a finite impulse response circuit coupled with a feedback loop

US7627287B2
(en)

2005-05-20
2009-12-01
British Broadcasting Corporation
On-channel repeater

Also Published As

Publication number
Publication date

DE1812503B2
(en)

1980-02-28

DE1812503C3
(en)

1980-10-16

DE1812503A1
(en)

1969-08-14

FR1602147A
(en)

1970-10-12

US3586846A
(en)

1971-06-22

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