GB1259537A – – Google Patents
GB1259537A – – Google Patents
Info
Publication number
GB1259537A
GB1259537A
GB1259537DA
GB1259537A
GB 1259537 A
GB1259537 A
GB 1259537A
GB 1259537D A
GB1259537D A
GB 1259537DA
GB 1259537 A
GB1259537 A
GB 1259537A
Authority
GB
United Kingdom
Prior art keywords
pattern
patterns
photo
plate
array
Prior art date
1969-09-12
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1969-09-12
Filing date
1969-09-12
Publication date
1972-01-05
1969-09-12
Application filed
filed
Critical
1972-01-05
Publication of GB1259537A
publication
Critical
patent/GB1259537A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F7/70—Microphotolithographic exposure; Apparatus therefor
G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
G—PHYSICS
G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G03F7/70—Microphotolithographic exposure; Apparatus therefor
G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Abstract
1,259,537. Producing photo-masks. ARBEITSSTELLE FUR MOLEKULARELEKTRONIK. Sept. 12, 1969, No.45085/69. Headings G2A and G2M. In the automatic production of a photo-mask comprising a row and column array of patterns 40 with predetermined spacings between the patterns by moving a photographic plate 36 with respect to an optical projection system (not shown), the plate is initially positioned independently of the row and column spacings, but subsequent movement of the plate is effected in dependence upon the row and column spacings. This gives an array as in the right hand part of Fig. 5, rather than as in the left hand part, which shows what happens when the first pattern 41 is generated in such a way that its location is fixed by the spacings of the rows and columns. For a pattern 40 built up of individual patterns (1-5) Fig. 1 (not shown) or for a pattern the dimensions of which are larger than those of the image field of the optical projection system used, and hence divided into sub-patterns (6-9) Figs.2 and 3 (not shown), the array is built up by successive step-and-repeat cycles a unique individual pattern or sub-pattern being associated with each cycle, and the plate being initially positioned with respect to the optical system only at the beginning of each cycle. For a photo-mask having a small size repetitive pattern, an intermediate size master having several of the required patterns thereon is first produced using the optical system. The array produced for the intermediate size master is located symmetrically with respect to the centre of the photographic plate. A circuit arrangement for controlling the automatic production of a photo-mask is also described.
GB1259537D
1969-09-12
1969-09-12
Expired
GB1259537A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
GB4508569
1969-09-12
Publications (1)
Publication Number
Publication Date
GB1259537A
true
GB1259537A
(en)
1972-01-05
Family
ID=10435825
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB1259537D
Expired
GB1259537A
(en)
1969-09-12
1969-09-12
Country Status (1)
Country
Link
GB
(1)
GB1259537A
(en)
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4408875A
(en)
*
1980-12-29
1983-10-11
Fujitsu Limited
Method of projecting circuit patterns
US4603974A
(en)
*
1984-03-05
1986-08-05
Fujitsu Limited
Reticle used in semiconductor device fabrication and a method for inspecting a reticle pattern thereon
US4869998A
(en)
*
1986-05-01
1989-09-26
Smiths Industries Public Limited Company
Intergrated circuit substrates
1969
1969-09-12
GB
GB1259537D
patent/GB1259537A/en
not_active
Expired
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4408875A
(en)
*
1980-12-29
1983-10-11
Fujitsu Limited
Method of projecting circuit patterns
US4603974A
(en)
*
1984-03-05
1986-08-05
Fujitsu Limited
Reticle used in semiconductor device fabrication and a method for inspecting a reticle pattern thereon
US4869998A
(en)
*
1986-05-01
1989-09-26
Smiths Industries Public Limited Company
Intergrated circuit substrates
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Legal Events
Date
Code
Title
Description
1972-05-17
PS
Patent sealed
1977-04-06
PLNP
Patent lapsed through nonpayment of renewal fees
