GB1310772A – Telecommunication line multiplexer
– Google Patents
GB1310772A – Telecommunication line multiplexer
– Google Patents
Telecommunication line multiplexer
Info
Publication number
GB1310772A
GB1310772A
GB1310772DA
GB1310772A
GB 1310772 A
GB1310772 A
GB 1310772A
GB 1310772D A
GB1310772D A
GB 1310772DA
GB 1310772 A
GB1310772 A
GB 1310772A
Authority
GB
United Kingdom
Prior art keywords
line
store
bit
lines
control
Prior art date
1971-07-27
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1971-07-27
Filing date
1971-07-27
Publication date
1973-03-21
1971-07-27
Application filed by International Business Machines Corp
filed
Critical
International Business Machines Corp
1973-03-21
Publication of GB1310772A
publication
Critical
patent/GB1310772A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04J—MULTIPLEX COMMUNICATION
H04J3/00—Time-division multiplex systems
H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
H04J3/1605—Fixed allocated frame structures
H04J3/1623—Plesiochronous digital hierarchy [PDH]
H04J3/1647—Subrate or multislot multiplexing
Abstract
1310772 Digital transmission; multiplexing INTERNATIONAL BUSINESS MACHINES CORP 27 July 1971 35060/71 Heading H4P A telecommunication line multiplexer comprises a plurality of bit buffer stores each connectible to a different plurality of telecommunication lines, a plurality of character buffer stores to each of which is connected at least one bit buffer store, and a multiplexer control unit which is arranged in operation successively and repeatedly to be connected to the character buffer stores for the transfer of message and control information, characterized in that the bit buffer stores are associative stores holding function tables whereby data bits are transferred between the bit buffer stores and the connected telecommunication lines under the control of programmes selected by tablelook-up operations, the tables being such that lines with different transmission rates can be connected to the same bit buffer. A plurality of bit buffer stores 10 are connected to lines 11 through interfaces 12 each of which is a cyclic shift register having stages 13 each connected to a line 11 and one stage to store 10. As information is circulated store 10 is connected successively to each line 11. Data can flow both ways between 12 and 10 also 11 and 10 so that transmission and reception can be proceeding concurrently on different lines. The main function of store 10 is to provide temporary storage and execute control by table look-up selection and comprises a number of line buffer registers each uniquely associated with a line 11. Character buffer stores 13 sequentially scan line buffers either for the purpose of bit-by-bit transfer or assembly of received bits into a character. Store 10 may also exercise line control and store 14 character control the latter being connected sequentially by line scheduler 14 for fixed periods of time to enable transfer of control information and message characters. Synchronism within the arrangement is maintained by a clock 20 but its output is not supplied to the elements as a train of pulses but is coded at 21 into the form required. Lines transmitting data at differing rates may be connected to the same interface 12 with certain restrictions; i.e. start-stop signals and bit synchronous signals cannot be connected to the same interface nor can bit synchronous lines clocked at modems with those clocked by a multiplexer. Units 10, 14, 16 are preferably identical and difference in operation is adjusted by means of function tables. Units 10, 14 may be single associative stores similar to that disclosed in Specification 1,186,703 and unit 16 may include several stores and a control store. Definition of search and read/write fields is by means of a mask which blanks off all except the search field, but due to complexity of operations two masks are used in each cycle, one for the search phase and the other for the read/write phase. If a mask store holds 16 mask pairs, four control bits are necessary to define each pair. Each store 10 executes a 3-cycle loop during each period of clock 20. In the first cycle a search-read operation is executed and data representing the status of the line as the previous sample time is read to input/output register. In cycle 2 the search-next-read operation is performed and line status is updated. In cycle 3 the search-write operation is carried out and data representing present status of the line is restored. Fig. 3 (not shown) illustrates the arrangement of tables for controlling data to start/stop lines on a bit basis and, Fig. 4 (not shown), for synchronous lines on a character basis. Detailed operation of the invention is described in the Specification.
GB1310772D
1971-07-27
1971-07-27
Telecommunication line multiplexer
Expired
GB1310772A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
GB3506071
1971-07-27
Publications (1)
Publication Number
Publication Date
GB1310772A
true
GB1310772A
(en)
1973-03-21
Family
ID=10373326
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB1310772D
Expired
GB1310772A
(en)
1971-07-27
1971-07-27
Telecommunication line multiplexer
Country Status (5)
Country
Link
JP
(1)
JPS532024B1
(en)
CA
(1)
CA984531A
(en)
DE
(1)
DE2233893C3
(en)
FR
(1)
FR2147040B1
(en)
GB
(1)
GB1310772A
(en)
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4254496A
(en)
*
1979-06-28
1981-03-03
Northern Telecom Limited
Digital communication bus system
FR2500974A1
(en)
*
1981-02-27
1982-09-03
Thomson Csf Mat Tel
Data formatting method for transmission of digital data – transmits data in time intervals from time multiplexer for telephone signalling circuit
EP0064120A1
(en)
*
1981-04-30
1982-11-10
International Business Machines Corporation
Process to determine the configuration of the active channels in a multiflex communication system, and device therefor
1971
1971-07-27
GB
GB1310772D
patent/GB1310772A/en
not_active
Expired
1972
1972-06-23
JP
JP6253472A
patent/JPS532024B1/ja
active
Pending
1972-06-30
FR
FR7224828A
patent/FR2147040B1/fr
not_active
Expired
1972-07-10
DE
DE19722233893
patent/DE2233893C3/en
not_active
Expired
1972-07-25
CA
CA147,825A
patent/CA984531A/en
not_active
Expired
Cited By (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4254496A
(en)
*
1979-06-28
1981-03-03
Northern Telecom Limited
Digital communication bus system
FR2500974A1
(en)
*
1981-02-27
1982-09-03
Thomson Csf Mat Tel
Data formatting method for transmission of digital data – transmits data in time intervals from time multiplexer for telephone signalling circuit
EP0064120A1
(en)
*
1981-04-30
1982-11-10
International Business Machines Corporation
Process to determine the configuration of the active channels in a multiflex communication system, and device therefor
US4477898A
(en)
*
1981-04-30
1984-10-16
International Business Machines Corporation
Process for determining active channel configurations in a multiplex communications system and a system for implementing said process
Also Published As
Publication number
Publication date
JPS532024B1
(en)
1978-01-24
DE2233893C3
(en)
1982-04-08
DE2233893A1
(en)
1973-02-08
CA984531A
(en)
1976-02-24
FR2147040B1
(en)
1986-03-07
DE2233893B2
(en)
1980-04-03
FR2147040A1
(en)
1973-03-09
Similar Documents
Publication
Publication Date
Title
KR880009520A
(en)
1988-09-15
Digital data memory system
US3238298A
(en)
1966-03-01
Multiplex communication system with multiline digital buffer
US3051929A
(en)
1962-08-28
Digital data converter
US4755971A
(en)
1988-07-05
Buffer memory for an input line of a digital interface
GB1318657A
(en)
1973-05-31
Redundancy reduction systems and apparatus therefor
GB1292070A
(en)
1972-10-11
Multiplexing apparatus
GB1396923A
(en)
1975-06-11
Data communication system
GB1310772A
(en)
1973-03-21
Telecommunication line multiplexer
US3281527A
(en)
1966-10-25
Data transmission
GB2229610A
(en)
1990-09-26
Pcm communication system
US3681755A
(en)
1972-08-01
Computer independent data concentrators
GB903806A
(en)
1962-08-22
Electronic data processing system
US4127851A
(en)
1978-11-28
Device for displaying characters
US3681760A
(en)
1972-08-01
Binary signal utilization and selective address detection system
US4023145A
(en)
1977-05-10
Time division multiplex signal processor
GB1069930A
(en)
1967-05-24
Improvements in or relating to data transmission systems
JPS60138635A
(en)
1985-07-23
Data buffer
US3300578A
(en)
1967-01-24
Data transmission
GB1184601A
(en)
1970-03-18
Data Handling System.
JPH0255434A
(en)
1990-02-23
Code generator
RU2029988C1
(en)
1995-02-27
Digital information input device
SU1594701A1
(en)
1990-09-23
Manchester code decoder
JPH0691523B2
(en)
1994-11-14
Frame synchronization method
SU1141417A1
(en)
1985-02-23
Interface for linking peripherals with communication channel
SU676992A1
(en)
1979-07-30
Indication device
Legal Events
Date
Code
Title
Description
1973-08-01
PS
Patent sealed
1991-08-28
PE20
Patent expired after termination of 20 years