GB1324409A – Digital data storage units for use in a digital electric data processing system
– Google Patents
GB1324409A – Digital data storage units for use in a digital electric data processing system
– Google Patents
Digital data storage units for use in a digital electric data processing system
Info
Publication number
GB1324409A
GB1324409A
GB4273270A
GB4273270A
GB1324409A
GB 1324409 A
GB1324409 A
GB 1324409A
GB 4273270 A
GB4273270 A
GB 4273270A
GB 4273270 A
GB4273270 A
GB 4273270A
GB 1324409 A
GB1324409 A
GB 1324409A
Authority
GB
United Kingdom
Prior art keywords
row
digital
data segment
processing system
data storage
Prior art date
1969-09-18
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4273270A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1969-09-18
Filing date
1970-09-07
Publication date
1973-07-25
1970-09-07
Application filed by Burroughs Corp
filed
Critical
Burroughs Corp
1973-07-25
Publication of GB1324409A
publication
Critical
patent/GB1324409A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F9/00—Arrangements for program control, e.g. control units
G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
G06F9/22—Microcontrol or microprogram arrangements
G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
G06F9/262—Arrangements for next microinstruction selection
G06F9/264—Microinstruction selection based on results of processing
Abstract
1324409 Data storage BURROUGHS CORP 7 Sept 1970 [18 Sept 1969] 42732/70 Heading G4C A digital data store comprises a matrix of bi-stable storage elements 30, e.g. of magnetic cores or thin film elements, each row storing a data segment, there being a bi-stable element 33 for each row which is set to binary 1 when a data segment is written into that row and is set to binary 0 when a data segment is read from that row, and address logic 39 including circuits which inspect adjacent pairs of the elements 33 so that the segments can be selectively read out in the same sequence, or in the opposite sequence, to which they were read in. Logic is also provided for reading the segments in a random access mode. The store may be used in microprogrammed systems as described in Specifications 1,318,231 and 1,318,232 or in a three memory system (Fig. 1, not shown).
GB4273270A
1969-09-18
1970-09-07
Digital data storage units for use in a digital electric data processing system
Expired
GB1324409A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
US85913969A
1969-09-18
1969-09-18
Publications (1)
Publication Number
Publication Date
GB1324409A
true
GB1324409A
(en)
1973-07-25
Family
ID=25330147
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB4273270A
Expired
GB1324409A
(en)
1969-09-18
1970-09-07
Digital data storage units for use in a digital electric data processing system
Country Status (3)
Country
Link
US
(1)
US3629857A
(en)
BE
(1)
BE755666A
(en)
GB
(1)
GB1324409A
(en)
Families Citing this family (21)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3962684A
(en)
*
1971-08-31
1976-06-08
Texas Instruments Incorporated
Computing system interface using common parallel bus and segmented addressing
US3725876A
(en)
*
1972-02-08
1973-04-03
Burroughs Corp
Data processor having an addressable local memory linked to a memory stack as an extension thereof
US3786432A
(en)
*
1972-06-20
1974-01-15
Honeywell Inf Systems
Push-pop memory stack having reach down mode and improved means for processing double-word items
JPS537110B2
(en)
*
1972-07-14
1978-03-14
US3922643A
(en)
*
1974-09-04
1975-11-25
Gte Sylvania Inc
Memory and memory addressing system
NL7713708A
(en)
*
1977-12-12
1979-06-14
Philips Nv
INFORMATION BUFFER MEMORY OF THE “FIRST-IN, FIRST-OUT” TYPE WITH FIXED INPUT AND VARIABLE OUTPUT.
NL7713706A
(en)
*
1977-12-12
1979-06-14
Philips Nv
INFORMATION BUFFER MEMORY OF THE “FIRST-IN, FIRST-OUT” TYPE WITH A VARIABLE INPUT AND A VARIABLE OUTPUT.
US4228500A
(en)
*
1978-03-27
1980-10-14
Honeywell Information Systems Inc.
Command stacking apparatus for use in a memory controller
US4320466A
(en)
*
1979-10-26
1982-03-16
Texas Instruments Incorporated
Address sequence mechanism for reordering data continuously over some interval using a single memory structure
US4486854A
(en)
*
1981-10-15
1984-12-04
Codex Corporation
First-in, first-out memory system
US4530049A
(en)
*
1982-02-11
1985-07-16
At&T Bell Laboratories
Stack cache with fixed size stack frames
US4995005A
(en)
*
1986-09-18
1991-02-19
Advanced Micro Devices, Inc.
Memory device which can function as two separate memories or a single memory
US4847812A
(en)
*
1986-09-18
1989-07-11
Advanced Micro Devices
FIFO memory device including circuit for generating flag signals
US4980821A
(en)
*
1987-03-24
1990-12-25
Harris Corporation
Stock-memory-based writable instruction set computer having a single data bus
US5053952A
(en)
*
1987-06-05
1991-10-01
Wisc Technologies, Inc.
Stack-memory-based writable instruction set computer having a single data bus
US5367649A
(en)
*
1988-05-20
1994-11-22
Waferscale Integration, Inc.
Programmable controller
GB2232797B
(en)
*
1989-06-16
1993-12-08
Samsung Semiconductor Inc
RAM based serial memory with pipelined look-ahead reading
JPH0785224B2
(en)
*
1989-10-23
1995-09-13
インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン
Stack control device and stack control method
US5504913A
(en)
*
1992-05-14
1996-04-02
Apple Computer, Inc.
Queue memory with self-handling addressing and underflow
EP0780017A1
(en)
*
1995-07-10
1997-06-25
Xilinx, Inc.
System comprising field programmable gate array and intelligent memory
US5822752A
(en)
*
1996-07-15
1998-10-13
International Business Machines Corporation
Method and apparatus for fast parallel determination of queue entries
Family Cites Families (8)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3200379A
(en)
*
1961-01-23
1965-08-10
Burroughs Corp
Digital computer
US3234524A
(en)
*
1962-05-28
1966-02-08
Ibm
Push-down memory
US3292153A
(en)
*
1962-10-01
1966-12-13
Burroughs Corp
Memory system
NL299950A
(en)
*
1962-12-03
US3374467A
(en)
*
1965-05-27
1968-03-19
Lear Siegler Inc
Digital data processor
US3274566A
(en)
*
1966-02-15
1966-09-20
Rca Corp
Storage circuit
US3518631A
(en)
*
1967-01-13
1970-06-30
Ibm
Associative memory system which can be addressed associatively or conventionally
US3513448A
(en)
*
1969-06-11
1970-05-19
Philip N Armstrong
Buffer system
0
BE
BE755666D
patent/BE755666A/en
not_active
IP Right Cessation
1969
1969-09-18
US
US859139A
patent/US3629857A/en
not_active
Expired – Lifetime
1970
1970-09-07
GB
GB4273270A
patent/GB1324409A/en
not_active
Expired
Also Published As
Publication number
Publication date
BE755666A
(en)
1971-02-15
US3629857A
(en)
1971-12-21
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Legal Events
Date
Code
Title
Description
1973-12-05
PS
Patent sealed [section 19, patents act 1949]
1986-05-08
PCNP
Patent ceased through non-payment of renewal fee
