GB1445163A – Variable-rate data-signal receiver
– Google Patents
GB1445163A – Variable-rate data-signal receiver
– Google Patents
Variable-rate data-signal receiver
Info
Publication number
GB1445163A
GB1445163A
GB5162173A
GB5162173A
GB1445163A
GB 1445163 A
GB1445163 A
GB 1445163A
GB 5162173 A
GB5162173 A
GB 5162173A
GB 5162173 A
GB5162173 A
GB 5162173A
GB 1445163 A
GB1445163 A
GB 1445163A
Authority
GB
United Kingdom
Prior art keywords
speed
output
pulses
clock
gates
Prior art date
1972-11-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5162173A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telecommunications Radioelectriques et Telephoniques SA TRT
Original Assignee
Telecommunications Radioelectriques et Telephoniques SA TRT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1972-11-10
Filing date
1973-11-07
Publication date
1976-08-04
1973-11-07
Application filed by Telecommunications Radioelectriques et Telephoniques SA TRT
filed
Critical
Telecommunications Radioelectriques et Telephoniques SA TRT
1976-08-04
Publication of GB1445163A
publication
Critical
patent/GB1445163A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04J—MULTIPLEX COMMUNICATION
H04J3/00—Time-division multiplex systems
H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L7/00—Arrangements for synchronising receiver with transmitter
Abstract
1445163 Data transmission; multi-speed systems TELECOMMUNICATIONS RADIOELECTRIQUES ET TELEPHONIQUES 7 Nov 1973 [10 Nov 1972] 51621/73 Heading H4P A synchronous data receiver operable on at least two transmission speeds related by an integer N has a speed change sensor detecting a decrease in speed. A speed increase detector may also be incorporated. The receiver comprises an N output cyclic pulse distributor 11 synchronized with a clock pulse generator 5 operating in a phase locked loop. A device 9 generates an output signal in the absence of pulses from at least one of the N outputs which are disconnected in the absence of detected transitions of received signals. N = 3 in Fig. 1 which comprises an operational amplifier 12 connected as an integrator by RC coupling 14, 15, of long time constant, feeding through threshold circuit 16 a NAND gate 9 also receiving inputs from similar circuits C2, C3. AND gates P1-P3 receive cyclic synchronous inputs from distributor 11, formed by a mod N = 3 counter 11 and stepped by a clock pulsd generator 5, phase locked with data transition detector 2, which also primes gates P1-P3. At the highest speed, integrators C1-C3 supply a continuous output to NAND 9 which gives 0 output. At change to 1/3 speed, coincidence will not occurr on two of gates, say P1, P3, between distributor output and transition pulses, hence output of C1, C3 decays, according to the characteristic of RC network 14, 15, bdlow the threshold value of 16 hence NAND 9 gives an output to circuit 10 which reverses switch 17- 19 to a corresponding lower frequency position ; switch 18 adapts the transition detector to a new rhythm and switch 19 narrows the passband of receiving circuits to reduce influence of noise. Transmitting speed may or may not be reduced in synchronism with clock 3 pulses. A second circuit detecting an increase in speed may be included and comprises a generator, comprising monostable circuits in cascade, supplying pulses at instants T/3, where T=bit rate, after positive going edges of clock pulses, so that zero crossings cannot be detected at the lower speed by analyser 22. When speed increases to higher rate, zero crossings should coincide with sampling pulses hence provide an input to integrator CL, similar to C1 &c. which provides an output to 10 which normalizes switches 17-19. In another arrangement (Fig. 6, not shown) the integrators are replaced by reversible counters which through a gate network operates in similar manner.
GB5162173A
1972-11-10
1973-11-07
Variable-rate data-signal receiver
Expired
GB1445163A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
FR7239931A
FR2206544B1
(en)
1972-11-10
1972-11-10
Publications (1)
Publication Number
Publication Date
GB1445163A
true
GB1445163A
(en)
1976-08-04
Family
ID=9106979
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB5162173A
Expired
GB1445163A
(en)
1972-11-10
1973-11-07
Variable-rate data-signal receiver
Country Status (6)
Country
Link
US
(1)
US3876833A
(en)
JP
(1)
JPS5317446B2
(en)
CA
(1)
CA995590A
(en)
DE
(1)
DE2355533C3
(en)
FR
(1)
FR2206544B1
(en)
GB
(1)
GB1445163A
(en)
Families Citing this family (21)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2022373B
(en)
*
1978-04-28
1983-02-02
Ericsson L M Pty Ltd
Interconntecting terminal device in a digital data network
NL7902340A
(en)
*
1979-03-26
1980-09-30
Philips Nv
METHOD FOR SYNCHRONIZING THE QUADPHASE RECEIVER AND CLOCK SYNCHRONIZER FOR PERFORMING THE METHOD.
US4558409A
(en)
*
1981-09-23
1985-12-10
Honeywell Information Systems Inc.
Digital apparatus for synchronizing a stream of data bits to an internal clock
US4488294A
(en)
*
1982-03-30
1984-12-11
At&T Bell Laboratories
Establishing and supporting data traffic in private branch exchanges
DE3228969A1
(en)
*
1982-08-03
1984-02-09
Siemens AG, 1000 Berlin und 8000 München
METHOD AND DEVICE FOR RECEIVING A CLOCK SIGNAL ON THE RECEIVING SIDE
FR2587159B1
(en)
*
1985-09-12
1987-11-13
Coatanea Pierre
MULTIPLEXING AND DEMULTIPLEXING EQUIPMENT FOR SYNCHRONOUS DIGITAL FLOW RATE AND VARIABLE MODULATION SPEED
DE3537477A1
(en)
*
1985-10-22
1987-04-23
Porsche Ag
ARRANGEMENT FOR INDIVIDUALLY ADAPTING A SERIAL INTERFACE OF A DATA PROCESSING SYSTEM TO A DATA TRANSMISSION SPEED OF A COMMUNICATION PARTNER
US4688246A
(en)
*
1985-12-20
1987-08-18
Zenith Electronics Corporation
CATV scrambling system with compressed digital audio in synchronizing signal intervals
JPH02266724A
(en)
*
1989-04-07
1990-10-31
Koden Kogyo Kk
Optical transmission equipment
JPH03201735A
(en)
*
1989-12-28
1991-09-03
Advantest Corp
Data multiplexer
JP2002247135A
(en)
*
2001-02-20
2002-08-30
Sony Corp
Signal transmission method and apparatus, and signal transmission system
US20050224899A1
(en)
*
2002-02-06
2005-10-13
Ramsey Craig C
Wireless substrate-like sensor
US20050224902A1
(en)
*
2002-02-06
2005-10-13
Ramsey Craig C
Wireless substrate-like sensor
US7289230B2
(en)
*
2002-02-06
2007-10-30
Cyberoptics Semiconductors, Inc.
Wireless substrate-like sensor
US20050233770A1
(en)
*
2002-02-06
2005-10-20
Ramsey Craig C
Wireless substrate-like sensor
KR101259218B1
(en)
*
2006-02-21
2013-04-29
싸이버옵틱스 쎄미콘덕터 인코퍼레이티드
Capacitive distance sensing in semiconductor processing tools
US7893697B2
(en)
*
2006-02-21
2011-02-22
Cyberoptics Semiconductor, Inc.
Capacitive distance sensing in semiconductor processing tools
CN101517701B
(en)
*
2006-09-29
2011-08-10
赛博光学半导体公司
Substrate-like particle sensor
US7778793B2
(en)
*
2007-03-12
2010-08-17
Cyberoptics Semiconductor, Inc.
Wireless sensor for semiconductor processing systems
US20080246493A1
(en)
*
2007-04-05
2008-10-09
Gardner Delrae H
Semiconductor Processing System With Integrated Showerhead Distance Measuring Device
US20090015268A1
(en)
*
2007-07-13
2009-01-15
Gardner Delrae H
Device and method for compensating a capacitive sensor measurement for variations caused by environmental conditions in a semiconductor processing environment
Family Cites Families (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB1029815A
(en)
*
1962-08-29
1966-05-18
Nat Res Dev
Improvements in television and like data transmission systems
US3286026A
(en)
*
1963-10-24
1966-11-15
Itt
Television bandwidth reduction system
US3467783A
(en)
*
1964-08-18
1969-09-16
Motorola Inc
Speech bandwidth reduction by sampling 1/n cycles storing the samples,and reading the samples out at 1/n the sampling rate
US3647967A
(en)
*
1969-07-10
1972-03-07
Trt Telecom Radio Electr
Telegraphy receiver for harmonic telegraphy
1972
1972-11-10
FR
FR7239931A
patent/FR2206544B1/fr
not_active
Expired
1973
1973-11-07
DE
DE2355533A
patent/DE2355533C3/en
not_active
Expired
1973-11-07
GB
GB5162173A
patent/GB1445163A/en
not_active
Expired
1973-11-07
CA
CA185,214A
patent/CA995590A/en
not_active
Expired
1973-11-08
US
US413813A
patent/US3876833A/en
not_active
Expired – Lifetime
1973-11-09
JP
JP12555673A
patent/JPS5317446B2/ja
not_active
Expired
Also Published As
Publication number
Publication date
DE2355533C3
(en)
1979-02-22
JPS5317446B2
(en)
1978-06-08
FR2206544B1
(en)
1976-12-31
CA995590A
(en)
1976-08-24
DE2355533A1
(en)
1974-05-16
DE2355533B2
(en)
1978-06-08
US3876833A
(en)
1975-04-08
JPS4996616A
(en)
1974-09-12
FR2206544A1
(en)
1974-06-07
Similar Documents
Publication
Publication Date
Title
GB1445163A
(en)
1976-08-04
Variable-rate data-signal receiver
US3562710A
(en)
1971-02-09
Bit error detector for digital communication system
GB971359A
(en)
US4100531A
(en)
1978-07-11
Bit error rate measurement above and below bit rate tracking threshold
GB1482732A
(en)
1977-08-10
Frequency shift demodulators
GB1535893A
(en)
1978-12-13
Repeater for receiving and transmitting data signals
US3437937A
(en)
1969-04-08
Digital squelch system
GB1499580A
(en)
1978-02-01
Digital device for detecting the presence of an nrz message
US4292626A
(en)
1981-09-29
Manchester decoder
US3247491A
(en)
1966-04-19
Synchronizing pulse generator
GB1230046A
(en)
1971-04-28
GB1476878A
(en)
1977-06-16
Binary phase digital decoding system
GB1482693A
(en)
1977-08-10
Frequency-shift keying discriminator
GB935375A
(en)
1963-08-28
Improved parity checker
US3713017A
(en)
1973-01-23
Frequency shift keyed apparatus
GB1402176A
(en)
1975-08-06
Computer interface coding and decoding apparatus
US4771442A
(en)
1988-09-13
Electrical apparatus
US3376517A
(en)
1968-04-02
Automatic frequency control using voltage transitions of an input reference signal
US3566280A
(en)
1971-02-23
Digital communications clock synchronizer for responding to pulses of predetermined width and further predictable pulses of sufficient energy level during particular interval
GB1249536A
(en)
1971-10-13
An adapter
FI65679C
(en)
1984-06-11
FJAERREGLERINGSMOTTAGARE AV RAEKNARTYP MED BRUSIMMUNITETSSYSTEM
GB1245611A
(en)
1971-09-08
Improvements in frequency discriminator circuits
US3537013A
(en)
1970-10-27
Digital phase lock loop
US3343091A
(en)
1967-09-19
Diphase transmission system with noise pulse cancellation
US4361897A
(en)
1982-11-30
Circuit arrangement for clock pulse recovery at the receiving end of digital clock-controlled data transmission systems
Legal Events
Date
Code
Title
Description
1976-12-15
PS
Patent sealed [section 19, patents act 1949]
1988-06-29
PCNP
Patent ceased through non-payment of renewal fee
