GB1448011A – Methods of manufacturing semiconductor devices
– Google Patents
GB1448011A – Methods of manufacturing semiconductor devices
– Google Patents
Methods of manufacturing semiconductor devices
Info
Publication number
GB1448011A
GB1448011A
GB1925673A
GB1925673A
GB1448011A
GB 1448011 A
GB1448011 A
GB 1448011A
GB 1925673 A
GB1925673 A
GB 1925673A
GB 1925673 A
GB1925673 A
GB 1925673A
GB 1448011 A
GB1448011 A
GB 1448011A
Authority
GB
United Kingdom
Prior art keywords
diffusion
region
layer
regions
employed
Prior art date
1973-04-24
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1925673A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ferranti International PLC
Original Assignee
Ferranti PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-04-24
Filing date
1973-04-24
Publication date
1976-09-02
1973-04-24
Application filed by Ferranti PLC
filed
Critical
Ferranti PLC
1973-04-24
Priority to GB1925673A
priority
Critical
patent/GB1448011A/en
1976-09-02
Publication of GB1448011A
publication
Critical
patent/GB1448011A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
H01L21/76—Making of isolation regions between components
H01L21/761—PN junctions
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
H01L21/2251—Diffusion into or out of group IV semiconductors
H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
Abstract
1448011 Semi-conductor devices FERRANTI Ltd 22 April 1974 [24 April 1973] 19256/73 Heading H1K In a method of simultaneously diffusing to different depths in a monocrystalline semiconductor body 13 two spaced regions 18, 19 of the same conductivity type, in which the deeper region 19 extends through a heavily doped surface region 11 and encircles the other region 18 which does not extend beyond the surface region 11, a layer 15 of a diffusion-retarding material is selectively formed over the shallower region 18 before the diffusion of the regions is effected. Adjacent the diffusing-retarding layer 15 and covering the remainder of the surface 12 of the body 13 apart from that overlying the region 19, there is provided a layer of diffusion-resistant material, e.g. thermally grown silicon oxide, to mask the body in these regions against diffusion. The deeper region 19 is employed at least partially to isolate the device, e.g. a tri-mask bipolar transistor, as shown, or a collector-diffusion-isolation bipolar transistor, Fig. 4 (not shown), within the semiconductor body. The diffusion-retarding material 15 may comprise intrinsic polycrystalline silicon 3000 Š thick which may be employed after the diffusion process as part of the contact to the emitter region 18. In addition the layer 15 may be partially doped with impurity during the formation of the regions 18, 19 and may thus be employed as a resistor connected to the emitter 18.
GB1925673A
1973-04-24
1973-04-24
Methods of manufacturing semiconductor devices
Expired
GB1448011A
(en)
Priority Applications (1)
Application Number
Priority Date
Filing Date
Title
GB1925673A
GB1448011A
(en)
1973-04-24
1973-04-24
Methods of manufacturing semiconductor devices
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
GB1925673A
GB1448011A
(en)
1973-04-24
1973-04-24
Methods of manufacturing semiconductor devices
Publications (1)
Publication Number
Publication Date
GB1448011A
true
GB1448011A
(en)
1976-09-02
Family
ID=10126344
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB1925673A
Expired
GB1448011A
(en)
1973-04-24
1973-04-24
Methods of manufacturing semiconductor devices
Country Status (1)
Country
Link
GB
(1)
GB1448011A
(en)
1973
1973-04-24
GB
GB1925673A
patent/GB1448011A/en
not_active
Expired
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Legal Events
Date
Code
Title
Description
1977-01-13
PS
Patent sealed
1988-06-08
732
Registration of transactions, instruments or events in the register (sect. 32/1977)
1992-09-16
732
Registration of transactions, instruments or events in the register (sect. 32/1977)
1994-05-18
PE20
Patent expired after termination of 20 years
Effective date:
19940421
