GB1462935A

GB1462935A – Circuit arrangement
– Google Patents

GB1462935A – Circuit arrangement
– Google Patents
Circuit arrangement

Info

Publication number
GB1462935A

GB1462935A
GB1945474A
GB1945474A
GB1462935A
GB 1462935 A
GB1462935 A
GB 1462935A
GB 1945474 A
GB1945474 A
GB 1945474A
GB 1945474 A
GB1945474 A
GB 1945474A
GB 1462935 A
GB1462935 A
GB 1462935A
Authority
GB
United Kingdom
Prior art keywords
fet
voltage
substrate
potential
chip
Prior art date
1973-06-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB1945474A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-06-29
Filing date
1974-05-03
Publication date
1977-01-26

1974-05-03
Application filed by International Business Machines Corp
filed
Critical
International Business Machines Corp

1977-01-26
Publication of GB1462935A
publication
Critical
patent/GB1462935A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

G—PHYSICS

G05—CONTROLLING; REGULATING

G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties

G05F3/02—Regulating voltage or current

G05F3/08—Regulating voltage or current wherein the variable is dc

G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics

G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices

G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations

G05F3/205—Substrate bias-voltage generators

Abstract

1462935 Automatic voltage control INTERNATIONAL BUSINESS MACHINES CORP 3 May 1974 [29 June 1973] 19454/74 Heading G3R A plurality of field effect transistors are arranged on a substrate of a semi-conductor chip to which is applied a potential lying outside the range of upper and lower potential levels which are connected across certain of the FET’s. The substrate potential is regulated to a desired level. As shown, each one of a series of semiconductor chips 1-N has formed on it a control arrangement for stabilizing the threshold voltages of FET’s formed on the chips. Spread in intrinsic threshold voltages, and variations in the power supply to the chips are compensated. In the case of chip 1, a circuit 100 includes a substrate voltage detector 30 comprising a pair of FET’s 31, 32 forming a voltage divider connected between earth and a positive supply voltage +V. The junction voltage is compared by an FET 34 with the substrate voltage, producing a signal which controls the conduction of an FET 27 in an inverter 20 receiving a high frequency pulsed input from a ring oscillator 10 also formed on the chip. The inverter produces a further signal to control an FET 41 in a voltage level converter 40 which determines the magnitude of a negative potential connected to the substrate by way of a diode D1.

GB1945474A
1973-06-29
1974-05-03
Circuit arrangement

Expired

GB1462935A
(en)

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

US37527173A

1973-06-29
1973-06-29

Publications (1)

Publication Number
Publication Date

GB1462935A
true

GB1462935A
(en)

1977-01-26

Family
ID=23480213
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB1945474A
Expired

GB1462935A
(en)

1973-06-29
1974-05-03
Circuit arrangement

Country Status (14)

Country
Link

JP
(1)

JPS5417541B2
(en)

BE
(1)

BE815619A
(en)

CA
(1)

CA1033410A
(en)

CH
(1)

CH570705A5
(en)

DD
(1)

DD114197A5
(en)

DE
(1)

DE2422653C2
(en)

ES
(1)

ES427740A1
(en)

FR
(1)

FR2235417B1
(en)

GB
(1)

GB1462935A
(en)

IL
(1)

IL45251A
(en)

IT
(1)

IT1012365B
(en)

NL
(1)

NL7408728A
(en)

SE
(1)

SE391996B
(en)

SU
(1)

SU643099A3
(en)

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

GB2184902A
(en)

*

1983-11-02
1987-07-01
Inmos Corp
Substrate bias generator

Families Citing this family (15)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US4030084A
(en)

*

1975-11-28
1977-06-14
Honeywell Information Systems, Inc.
Substrate bias voltage generated from refresh oscillator

JPS5327374A
(en)

*

1976-08-26
1978-03-14
Sharp Corp
High voltage drive metal oxide semiconductor device

JPS5482056A
(en)

*

1977-12-13
1979-06-29
Nec Corp
Substrate bias voltage generator circuit

JPS5513566A
(en)

*

1978-07-17
1980-01-30
Hitachi Ltd
Mis field effect semiconductor circuit device

US4229667A
(en)

*

1978-08-23
1980-10-21
Rockwell International Corporation
Voltage boosting substrate bias generator

JPS5559756A
(en)

*

1978-10-30
1980-05-06
Fujitsu Ltd
Semiconductor device

EP0015342B1
(en)

*

1979-03-05
1984-01-25
Motorola, Inc.
Substrate bias regulator

JPS55162257A
(en)

*

1979-06-05
1980-12-17
Fujitsu Ltd
Semiconductor element having substrate bias generator circuit

JPS5619676A
(en)

*

1979-07-26
1981-02-24
Fujitsu Ltd
Semiconductor device

JPS56117390A
(en)

*

1980-02-16
1981-09-14
Fujitsu Ltd
Semiconductor memory device

JPS57199335A
(en)

*

1981-06-02
1982-12-07
Toshiba Corp
Generating circuit for substrate bias

US4503465A
(en)

*

1982-11-24
1985-03-05
Rca Corporation
Analog signal comparator using digital circuitry

US4571505A
(en)

*

1983-11-16
1986-02-18
Inmos Corporation
Method and apparatus of reducing latch-up susceptibility in CMOS integrated circuits

US5039877A
(en)

*

1990-08-30
1991-08-13
Micron Technology, Inc.
Low current substrate bias generator

US5157278A
(en)

*

1990-10-30
1992-10-20
Samsung Electronics Co., Ltd.
Substrate voltage generator for semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3609414A
(en)

*

1968-08-20
1971-09-28
Ibm
Apparatus for stabilizing field effect transistor thresholds

DE1921131C3
(en)

*

1969-04-25
1979-01-18
Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt

Arrangement for temperature compensation of a field effect transistor arranged as a control actuator in amplifiers

NL7103303A
(en)

*

1970-03-13
1971-09-15

1974

1974-05-03
GB
GB1945474A
patent/GB1462935A/en
not_active
Expired

1974-05-10
DE
DE2422653A
patent/DE2422653C2/en
not_active
Expired

1974-05-15
FR
FR7417744A
patent/FR2235417B1/fr
not_active
Expired

1974-05-15
IT
IT22720/74A
patent/IT1012365B/en
active

1974-05-21
CH
CH696474A
patent/CH570705A5/xx
not_active
IP Right Cessation

1974-05-28
BE
BE144820A
patent/BE815619A/en
not_active
IP Right Cessation

1974-06-04
CA
CA201,612A
patent/CA1033410A/en
not_active
Expired

1974-06-05
JP
JP6300574A
patent/JPS5417541B2/ja
not_active
Expired

1974-06-13
SE
SE7407783A
patent/SE391996B/en
not_active
IP Right Cessation

1974-06-27
DD
DD179526A
patent/DD114197A5/xx
unknown

1974-06-27
NL
NL7408728A
patent/NL7408728A/xx
unknown

1974-06-27
ES
ES427740A
patent/ES427740A1/en
not_active
Expired

1974-06-28
SU
SU742038403A
patent/SU643099A3/en
active

1974-07-12
IL
IL45251A
patent/IL45251A/en
unknown

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

GB2184902A
(en)

*

1983-11-02
1987-07-01
Inmos Corp
Substrate bias generator

Also Published As

Publication number
Publication date

NL7408728A
(en)

1974-12-31

CH570705A5
(en)

1975-12-15

IL45251A0
(en)

1974-12-31

SU643099A3
(en)

1979-01-15

SE7407783L
(en)

1974-12-30

FR2235417B1
(en)

1976-06-25

SE391996B
(en)

1977-03-07

DE2422653C2
(en)

1983-03-31

ES427740A1
(en)

1976-08-01

JPS5417541B2
(en)

1979-06-30

FR2235417A1
(en)

1975-01-24

IL45251A
(en)

1976-10-31

BE815619A
(en)

1974-09-16

DD114197A5
(en)

1975-07-12

JPS5024054A
(en)

1975-03-14

IT1012365B
(en)

1977-03-10

CA1033410A
(en)

1978-06-20

DE2422653A1
(en)

1975-01-16

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(en)

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Legal Events

Date
Code
Title
Description

1977-06-22
PS
Patent sealed [section 19, patents act 1949]

1994-01-05
PCNP
Patent ceased through non-payment of renewal fee

Effective date:
19930503

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