GB1517206A – Single-transistor storage elements
– Google Patents
GB1517206A – Single-transistor storage elements
– Google Patents
Single-transistor storage elements
Info
Publication number
GB1517206A
GB1517206A
GB43088/75A
GB4308875A
GB1517206A
GB 1517206 A
GB1517206 A
GB 1517206A
GB 43088/75 A
GB43088/75 A
GB 43088/75A
GB 4308875 A
GB4308875 A
GB 4308875A
GB 1517206 A
GB1517206 A
GB 1517206A
Authority
GB
United Kingdom
Prior art keywords
line
transistor
capacitor
electrode connected
oct
Prior art date
1974-10-22
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB43088/75A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1974-10-22
Filing date
1975-10-21
Publication date
1978-07-12
1975-10-21
Application filed by Siemens AG
filed
Critical
Siemens AG
1978-07-12
Publication of GB1517206A
publication
Critical
patent/GB1517206A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
G11C14/0018—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C16/00—Erasable programmable read-only memories
G11C16/02—Erasable programmable read-only memories electrically programmable
G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
H01L27/0733—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with capacitors only
H—ELECTRICITY
H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
H10B—ELECTRONIC MEMORY DEVICES
H10B12/00—Dynamic random access memory [DRAM] devices
Abstract
1517206 Transistor memory circuits SIEMENS AG 21 Oct 1975 [22 Oct 1974] 43088/75 Heading H3T A storage element comprises a field effect transistor 1 having its source electrode connected to one electrode of a metal-dielectric-semiconductor capacitor 2, the dielectric of which contains chargeable traps, its drain electrode connected to a bit line 31, and its gate electrode connected to a word line 10, the other electrode of the capacitor being connected to a write-in line 20. To write a “1” transistor 1 is turned on by a signal on line 10, to bring its source to -15v. A -30v signal is then applied to line 20 to form an inversion layer at the surface of the substrate. If a “0” is to be stored then only a depletion layer is present at the silicon surface of MNOS capacitor 2.
GB43088/75A
1974-10-22
1975-10-21
Single-transistor storage elements
Expired
GB1517206A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
DE19742450116
DE2450116C2
(en)
1974-10-22
1974-10-22
One transistor dynamic memory element for non-volatile memory and method for its operation
Publications (1)
Publication Number
Publication Date
GB1517206A
true
GB1517206A
(en)
1978-07-12
Family
ID=5928844
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB43088/75A
Expired
GB1517206A
(en)
1974-10-22
1975-10-21
Single-transistor storage elements
Country Status (6)
Country
Link
US
(1)
US4055837A
(en)
JP
(1)
JPS5857839B2
(en)
DE
(1)
DE2450116C2
(en)
FR
(1)
FR2289027B1
(en)
GB
(1)
GB1517206A
(en)
NL
(1)
NL7512337A
(en)
Families Citing this family (24)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3986180A
(en)
*
1975-09-22
1976-10-12
International Business Machines Corporation
Depletion mode field effect transistor memory system
US4149270A
(en)
*
1977-09-26
1979-04-10
Westinghouse Electric Corp.
Variable threshold device memory circuit having automatic refresh feature
JPS5457875A
(en)
*
1977-10-17
1979-05-10
Hitachi Ltd
Semiconductor nonvolatile memory device
JPS56110252A
(en)
*
1980-02-05
1981-09-01
Nippon Telegr & Teleph Corp
Semiconductor memory device
GB2072417B
(en)
*
1980-03-19
1983-12-14
Plessey Co Ltd
Semiconductor memory element
US4363110A
(en)
*
1980-12-22
1982-12-07
International Business Machines Corp.
Non-volatile dynamic RAM cell
US4375085A
(en)
*
1981-01-02
1983-02-22
International Business Machines Corporation
Dense electrically alterable read only memory
US4380803A
(en)
*
1981-02-10
1983-04-19
Burroughs Corporation
Read-only/read-write memory
US4434478A
(en)
*
1981-11-27
1984-02-28
International Business Machines Corporation
Programming floating gate devices
US4446535A
(en)
*
1981-12-31
1984-05-01
International Business Machines Corporation
Non-inverting non-volatile dynamic RAM cell
US4432072A
(en)
*
1981-12-31
1984-02-14
International Business Machines Corporation
Non-volatile dynamic RAM cell
US4471471A
(en)
*
1981-12-31
1984-09-11
International Business Machines Corporation
Non-volatile RAM device
US4449205A
(en)
*
1982-02-19
1984-05-15
International Business Machines Corp.
Dynamic RAM with non-volatile back-up storage and method of operation thereof
JPS6322398B2
(en)
*
1983-05-31
1988-05-11
Tokyo Shibaura Electric Co
JPH0568799B2
(en)
*
1986-05-13
1993-09-29
Mitsubishi Electric Corp
JP2731701B2
(en)
*
1993-06-30
1998-03-25
インターナショナル・ビジネス・マシーンズ・コーポレイション
DRAM cell
US5781487A
(en)
*
1995-04-27
1998-07-14
Lg Semicon Co., Ltd.
Bit line selection circuit
US5640030A
(en)
*
1995-05-05
1997-06-17
International Business Machines Corporation
Double dense ferroelectric capacitor cell memory
US5598367A
(en)
*
1995-06-07
1997-01-28
International Business Machines Corporation
Trench EPROM
US6849909B1
(en)
*
2000-09-28
2005-02-01
Intel Corporation
Method and apparatus for weak inversion mode MOS decoupling capacitor
US6829166B2
(en)
2002-09-13
2004-12-07
Ememory Technology Inc.
Method for controlling a non-volatile dynamic random access memory
EP1437742A1
(en)
*
2003-01-09
2004-07-14
eMemory Technology Inc.
Method for controlling a non-volatile dynamic random access memory
KR100719178B1
(en)
*
2003-08-29
2007-05-17
주식회사 하이닉스반도체
Method for driving of non-volatile dram
US9214465B2
(en)
2012-07-24
2015-12-15
Flashsilicon Incorporation
Structures and operational methods of non-volatile dynamic random access memory devices
Family Cites Families (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3855581A
(en)
*
1971-12-30
1974-12-17
Mos Technology Inc
Semiconductor device and circuits
1974
1974-10-22
DE
DE19742450116
patent/DE2450116C2/en
not_active
Expired
1975
1975-10-17
FR
FR7531833A
patent/FR2289027B1/fr
not_active
Expired
1975-10-21
NL
NL7512337A
patent/NL7512337A/en
unknown
1975-10-21
GB
GB43088/75A
patent/GB1517206A/en
not_active
Expired
1975-10-22
JP
JP50127255A
patent/JPS5857839B2/en
not_active
Expired
1975-10-22
US
US05/624,710
patent/US4055837A/en
not_active
Expired – Lifetime
Also Published As
Publication number
Publication date
FR2289027B1
(en)
1978-04-07
DE2450116B1
(en)
1976-01-22
JPS5857839B2
(en)
1983-12-22
DE2450116C2
(en)
1976-09-16
FR2289027A1
(en)
1976-05-21
US4055837A
(en)
1977-10-25
JPS5165532A
(en)
1976-06-07
NL7512337A
(en)
1976-04-26
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Legal Events
Date
Code
Title
Description
1978-11-08
PS
Patent sealed [section 19, patents act 1949]
1994-06-15
PCNP
Patent ceased through non-payment of renewal fee
Effective date:
19931021
