GB2004414A

GB2004414A – Insulated gate field-effect transistor read-only memory array
– Google Patents

GB2004414A – Insulated gate field-effect transistor read-only memory array
– Google Patents
Insulated gate field-effect transistor read-only memory array

Info

Publication number
GB2004414A

GB2004414A
GB7830247A
GB7830247A
GB2004414A
GB 2004414 A
GB2004414 A
GB 2004414A
GB 7830247 A
GB7830247 A
GB 7830247A
GB 7830247 A
GB7830247 A
GB 7830247A
GB 2004414 A
GB2004414 A
GB 2004414A
Authority
GB
United Kingdom
Prior art keywords
effect transistor
memory array
insulated gate
gate field
transistor read
Prior art date
1977-09-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Granted

Application number
GB7830247A
Other versions

GB2004414B
(en

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fairchild Semiconductor Corp

Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1977-09-16
Filing date
1978-07-18
Publication date
1979-03-28

1978-07-18
Application filed by Fairchild Camera and Instrument Corp
filed
Critical
Fairchild Camera and Instrument Corp

1979-03-28
Publication of GB2004414A
publication
Critical
patent/GB2004414A/en

1982-10-20
Application granted
granted
Critical

1982-10-20
Publication of GB2004414B
publication
Critical
patent/GB2004414B/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

230000005669
field effect
Effects

0.000
title
1

Classifications

G—PHYSICS

G11—INFORMATION STORAGE

G11C—STATIC STORES

G11C16/00—Erasable programmable read-only memories

G11C16/02—Erasable programmable read-only memories electrically programmable

G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]

G—PHYSICS

G11—INFORMATION STORAGE

G11C—STATIC STORES

G11C16/00—Erasable programmable read-only memories

G11C16/02—Erasable programmable read-only memories electrically programmable

G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

G11C16/0491—Virtual ground arrays

H—ELECTRICITY

H01—ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10

H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor

H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched

H01L29/76—Unipolar devices, e.g. field effect transistors

H01L29/772—Field effect transistors

H01L29/78—Field effect transistors with field effect produced by an insulated gate

H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

GB7830247A
1977-09-16
1978-07-18
Insulated gate field-effect transistor read-only memory array

Expired

GB2004414B
(en)

Applications Claiming Priority (1)

Application Number
Priority Date
Filing Date
Title

US05/834,016

US4173791A
(en)

1977-09-16
1977-09-16
Insulated gate field-effect transistor read-only memory array

Publications (2)

Publication Number
Publication Date

GB2004414A
true

GB2004414A
(en)

1979-03-28

GB2004414B

GB2004414B
(en)

1982-10-20

Family
ID=25265887
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB7830247A
Expired

GB2004414B
(en)

1977-09-16
1978-07-18
Insulated gate field-effect transistor read-only memory array

Country Status (6)

Country
Link

US
(1)

US4173791A
(en)

JP
(1)

JPS5453929A
(en)

CA
(1)

CA1067208A
(en)

DE
(1)

DE2838937A1
(en)

FR
(1)

FR2403623A1
(en)

GB
(1)

GB2004414B
(en)

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

FR2468185A1
(en)

*

1980-10-17
1981-04-30
Intel Corp
Programmable read only memory mfr. – forming two groups of conductive strips, mutually perpendicular and insulated and doped zones for memory cells using mos techniques

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1978-09-29
1982-11-02
Siemens Aktiengesellschaft
FET Module with reference source chargeable memory gate

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1980-02-01
1981-08-27
Hitachi Ltd
Semiconductor memory device

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1980-02-04
1983-06-07
Texas Instruments Incorporated
Column and ground select sequence in electrically programmable memory

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1980-02-04
1982-08-10
Texas Instruments Incorporated
Programming sequence for electrically programmable memory

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1980-06-30
1982-01-26
Rca Corporation
Electrically programmable logic array

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1981-08-19
1984-05-22
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Monolithically integrated read-only memory

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1984-05-15
1989-01-03
Waferscale Integration, Inc.
Self-aligned split gate eprom process

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1984-05-15
1987-01-27
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1989-09-19
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Self-aligned split gate EPROM

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1987-12-31
Eurotechnique Sa

METHOD FOR PROGRAMMING DATA IN AN ELECTRICALLY PROGRAMMABLE DEAD MEMORY

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1987-09-30
1991-05-14
Texas Instruments Incorporated
High speed EPROM with reverse polarity voltages applied to source and drain regions during reading and writing

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1989-09-27
1992-11-10
Kabushiki Kaisha Toshiba
Nonvolatile memory cell having gate insulation film with carrier traps therein

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1991-06-27
1997-03-05
Kabushiki Kaisha Toshiba
Nonvolatile semiconductor memory device and its operating method

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1991-09-09
1993-03-19
Rohm Co Ltd
Non-volatile memory device and its manufacture

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1991-10-21
2003-02-10
ローム株式会社

Semiconductor memory device and storage information reading method thereof

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1991-10-25
2002-12-24
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Semiconductor storage device and storage information reading method thereof

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1992-04-07
1999-07-22
Mitsubishi Electric Corp

Non-volatile semiconductor memory device and operating method for a non-volatile semiconductor memory device and method for programming information into a non-volatile semiconductor memory device

GB9217743D0
(en)

*

1992-08-19
1992-09-30
Philips Electronics Uk Ltd
A semiconductor memory device

JP3613594B2
(en)

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1993-08-19
2005-01-26
株式会社ルネサステクノロジ

Semiconductor element and semiconductor memory device using the same

US5768192A
(en)

*

1996-07-23
1998-06-16
Saifun Semiconductors, Ltd.
Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping

US6297096B1
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1997-06-11
2001-10-02
Saifun Semiconductors Ltd.
NROM fabrication method

IL125604A
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1997-07-30
2004-03-28
Saifun Semiconductors Ltd
Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge

US6768165B1
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1997-08-01
2004-07-27
Saifun Semiconductors Ltd.
Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping

US6633499B1
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1997-12-12
2003-10-14
Saifun Semiconductors Ltd.
Method for reducing voltage drops in symmetric array architectures

US6430077B1
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1997-12-12
2002-08-06
Saifun Semiconductors Ltd.
Method for regulating read voltage level at the drain of a cell in a symmetric array

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1997-12-12
2003-10-14
Saifun Semiconductors Ltd.
Symmetric architecture for memory cells having widely spread metal bit lines

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2000-02-29
Saifun Semiconductors Ltd.
Process for producing two bit ROM cell utilizing angled implant

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1998-05-20
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Saifun Semiconductors Ltd.
NROM cell with self-aligned programming and erasure areas

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NROM cell with improved programming, erasing and cycling

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Saifun Semiconductors Ltd.
NROM cell with generally decoupled primary and secondary injection

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Programming and erasing methods for a non-volatile memory cell

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Programming of nonvolatile memory cells

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Saifun Semiconductors Ltd.
Programming and erasing methods for a reference cell of an NROM array

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2000-12-20
2005-11-01
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System and method for one-time programmed memory through direct-tunneling oxide breakdown

US6614692B2
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2001-01-18
2003-09-02
Saifun Semiconductors Ltd.
EEPROM array and method for operation thereof

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2001-04-05
2003-06-24
Saifun Semiconductors Ltd.
Method for programming a reference cell

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2001-04-05
2004-01-13
Saifun Semiconductors Ltd.
Charge pump stage with body effect minimization

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2001-04-25
2003-10-21
Saifun Semiconductors Ltd.
Method for operation of an EEPROM array, including refresh thereof

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2001-10-24
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Saifun Semiconductors Ltd.
Method for erasing a memory cell

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2001-11-19
2006-08-29
Saifun Semiconductor Ltd.
Protective layer in memory device and method therefor

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2001-12-20
2005-04-26
Saifun Semiconductors Ltd.
NROM NOR array

US6583007B1
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2001-12-20
2003-06-24
Saifun Semiconductors Ltd.
Reducing secondary injection effects

US6700818B2
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2002-01-31
2004-03-02
Saifun Semiconductors Ltd.
Method for operating a memory device

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2002-05-06
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Erasing storage nodes in a bi-directional nonvolatile memory cell

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2002-05-06
2004-06-08
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Bi-directional floating gate nonvolatile memory

US7221591B1
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2002-05-06
2007-05-22
Samsung Electronics Co., Ltd.
Fabricating bi-directional nonvolatile memory cells

US6804136B2
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2002-06-21
2004-10-12
Micron Technology, Inc.
Write once read only memory employing charge trapping in insulators

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2002-07-08
2010-12-07
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Memory utilizing oxide-nitride nanolaminates

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2002-07-08
2007-05-22
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Memory utilizing oxide nanolaminates

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2002-07-08
2007-05-22
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Memory utilizing oxide-conductor nanolaminates

US6917544B2
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2002-07-10
2005-07-12
Saifun Semiconductors Ltd.
Multiple use memory chip

US6826107B2
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2002-08-01
2004-11-30
Saifun Semiconductors Ltd.
High voltage insertion in flash memory cards

JP2004127405A
(en)

*

2002-10-01
2004-04-22
Renesas Technology Corp
Nonvolatile semiconductor memory

US7136304B2
(en)

2002-10-29
2006-11-14
Saifun Semiconductor Ltd
Method, system and circuit for programming a non-volatile memory array

US7178004B2
(en)

2003-01-31
2007-02-13
Yan Polansky
Memory array programming circuit and a method for using the circuit

US7142464B2
(en)

2003-04-29
2006-11-28
Saifun Semiconductors Ltd.
Apparatus and methods for multi-level sensing in a memory array

US7123532B2
(en)

2003-09-16
2006-10-17
Saifun Semiconductors Ltd.
Operating array cells with matched reference cells

US7317633B2
(en)

2004-07-06
2008-01-08
Saifun Semiconductors Ltd
Protection of NROM devices from charge damage

JP2006024680A
(en)

*

2004-07-07
2006-01-26
Oki Electric Ind Co Ltd
Method for recording information on semiconductor non-volatile memory

US7095655B2
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2004-08-12
2006-08-22
Saifun Semiconductors Ltd.
Dynamic matching of signal path and reference path for sensing

US7638850B2
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2004-10-14
2009-12-29
Saifun Semiconductors Ltd.
Non-volatile memory structure and method of fabrication

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2005-01-19
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赛芬半导体有限公司
Method for erasing memory cell on memory array

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Memory array with sub-minimum feature size word line spacing and method of fabrication

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2005-08-17
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Saifun Semiconductors Ltd.
Method of erasing non-volatile memory cells

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2005-09-27
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Method and apparatus for measuring charge pump output current

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2006-01-03
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Method, system, and circuit for operating a non-volatile memory array

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2006-01-12
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Secondary injection for NROM

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2006-02-16
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Conductive layers for hafnium silicon oxynitride films

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NROM non-volatile memory and mode of operation

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Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection

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Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same

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Double density NROM with nitride strips (DDNS)

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Family Cites Families (6)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

US3744036A
(en)

*

1971-05-24
1973-07-03
Intel Corp
Electrically programmable read only memory array

JPS5232719B2
(en)

*

1972-05-18
1977-08-23

US3836992A
(en)

*

1973-03-16
1974-09-17
Ibm
Electrically erasable floating gate fet memory cell

JPS5534582B2
(en)

*

1974-06-24
1980-09-08

US4051464A
(en)

*

1975-09-08
1977-09-27
Honeywell Inc.
Semiconductor memory cell

GB1569897A
(en)

*

1975-12-31
1980-06-25
Ibm
Field effect transistor

1977

1977-09-16
US
US05/834,016
patent/US4173791A/en
not_active
Expired – Lifetime

1978

1978-07-14
CA
CA307,472A
patent/CA1067208A/en
not_active
Expired

1978-07-18
GB
GB7830247A
patent/GB2004414B/en
not_active
Expired

1978-09-07
DE
DE19782838937
patent/DE2838937A1/en
not_active
Ceased

1978-09-14
JP
JP11244678A
patent/JPS5453929A/en
active
Pending

1978-09-14
FR
FR7826419A
patent/FR2403623A1/en
active
Granted

Cited By (1)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

FR2468185A1
(en)

*

1980-10-17
1981-04-30
Intel Corp
Programmable read only memory mfr. – forming two groups of conductive strips, mutually perpendicular and insulated and doped zones for memory cells using mos techniques

Also Published As

Publication number
Publication date

FR2403623A1
(en)

1979-04-13

GB2004414B
(en)

1982-10-20

FR2403623B3
(en)

1980-12-26

US4173791A
(en)

1979-11-06

JPS5453929A
(en)

1979-04-27

DE2838937A1
(en)

1979-03-29

CA1067208A
(en)

1979-11-27

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Legal Events

Date
Code
Title
Description

1986-03-26
PCNP
Patent ceased through non-payment of renewal fee

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