GB1128576A – Data store
– Google Patents
GB1128576A – Data store
– Google Patents
Data store
Info
Publication number
GB1128576A
GB1128576A
GB34961/67A
GB3496167A
GB1128576A
GB 1128576 A
GB1128576 A
GB 1128576A
GB 34961/67 A
GB34961/67 A
GB 34961/67A
GB 3496167 A
GB3496167 A
GB 3496167A
GB 1128576 A
GB1128576 A
GB 1128576A
Authority
GB
United Kingdom
Prior art keywords
words
threshold
pair
sum
case
Prior art date
1967-07-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB34961/67A
Inventor
Peter Alan Edward Gardner
Michael Henry Hallett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1967-07-29
Filing date
1967-07-29
Publication date
1968-09-25
1967-07-29
Application filed by International Business Machines Corp
filed
Critical
International Business Machines Corp
1967-07-29
Priority to GB34961/67A
priority
Critical
patent/GB1128576A/en
1968-06-26
Priority to FR1574247D
priority
patent/FR1574247A/fr
1968-07-01
Priority to US741701A
priority
patent/US3593304A/en
1968-07-26
Priority to DE19681774606
priority
patent/DE1774606B1/en
1968-09-25
Publication of GB1128576A
publication
Critical
patent/GB1128576A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
G06F7/50—Adding; Subtracting
G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
G11C11/416—Read-write [R-W] circuits
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
G06F2207/38—Indexing scheme relating to groups G06F7/38 – G06F7/575
G06F2207/48—Indexing scheme relating to groups G06F7/48 – G06F7/575
G06F2207/4802—Special implementations
G06F2207/4818—Threshold devices
G06F2207/4822—Majority gates
Abstract
1,128,576. Electric digital calculators. INTERNATIONAL BUSINESS MACHINES CORP. 29 July, 1967, No. 34961/67. Heading G4A. In a multi-word data store capable of performing logical operations, bit conductors are each connected in common to the bit storage devices occupying corresponding bit positions in each of the word locations, and a plurality of majority logic gates each connect a different pair of adjacent bit conductors and produce a signal on one of the pair when the signal level on the other of the pair exceeds a threshold. Correspondingly – positioned bits of two words read simultaneously from respective rows of a matrix store are added on the column read-write lines. If the sum on a given column line exceeds 1, a threshold (majority logic) gate respective to the column adds 1 to the adjacent column line. In this way carries can be propagated during addition of two words (with end-around-carry in the case of twos-complement subtraction). After carry propagation, the sum (or difference) of the two words is obtained by a level discriminator circuit which in the case of each column line, produces a 1 output if the signal on the line is 1 or 3. Fig. 3 shows two words of the store utilizing cross-coupled pairs 6 of two-emitter transistors, each threshold gate being a transistor longtailed pair 7. The sum may be obtained, after carry propagation as above, without use of the level discriminator circuit, by a sequence of complementings, storings, majority operations (using the threshold gates and reading out three words simultaneously in each case) and shift (using an external shift register), which is described.
GB34961/67A
1967-07-29
1967-07-29
Data store
Expired
GB1128576A
(en)
Priority Applications (4)
Application Number
Priority Date
Filing Date
Title
GB34961/67A
GB1128576A
(en)
1967-07-29
1967-07-29
Data store
FR1574247D
FR1574247A
(en)
1967-07-29
1968-06-26
US741701A
US3593304A
(en)
1967-07-29
1968-07-01
Data store with logic operation
DE19681774606
DE1774606B1
(en)
1967-07-29
1968-07-26
MEMORY ARRANGEMENT FOR PERFORMING LOGICAL AND ARITHMETICAL BASIC OPERATIONS
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
GB34961/67A
GB1128576A
(en)
1967-07-29
1967-07-29
Data store
Publications (1)
Publication Number
Publication Date
GB1128576A
true
GB1128576A
(en)
1968-09-25
Family
ID=10372147
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB34961/67A
Expired
GB1128576A
(en)
1967-07-29
1967-07-29
Data store
Country Status (4)
Country
Link
US
(1)
US3593304A
(en)
DE
(1)
DE1774606B1
(en)
FR
(1)
FR1574247A
(en)
GB
(1)
GB1128576A
(en)
Families Citing this family (8)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB1281387A
(en)
*
1969-11-22
1972-07-12
Ibm
Associative store
US3729712A
(en)
*
1971-02-26
1973-04-24
Eastman Kodak Co
Information storage and retrieval system
US3790959A
(en)
*
1972-06-26
1974-02-05
Burroughs Corp
Capacitive read only memory
US5134711A
(en)
*
1988-05-13
1992-07-28
At&T Bell Laboratories
Computer with intelligent memory system
US5485588A
(en)
*
1992-12-18
1996-01-16
International Business Machines Corporation
Memory array based data reorganizer
US5873126A
(en)
*
1995-06-12
1999-02-16
International Business Machines Corporation
Memory array based data reorganizer
US6658552B1
(en)
1998-10-23
2003-12-02
Micron Technology, Inc.
Processing system with separate general purpose execution unit and data string manipulation unit
FR3091782B1
(en)
2019-01-10
2021-09-03
Commissariat Energie Atomique
PREDOMINANT DATA DETECTION CIRCUIT IN A MEMORY CELL
Family Cites Families (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
NL270019A
(en)
*
1960-10-07
US3241123A
(en)
*
1961-07-25
1966-03-15
Gen Electric
Data addressed memory
US3287703A
(en)
*
1962-12-04
1966-11-22
Westinghouse Electric Corp
Computer
US3332067A
(en)
*
1963-08-19
1967-07-18
Burroughs Corp
Tunnel diode associative memory
US3292159A
(en)
*
1963-12-10
1966-12-13
Bunker Ramo
Content addressable memory
US3329938A
(en)
*
1964-02-24
1967-07-04
Philip N Armstrong
Multiple-bit binary record sorting system
US3374466A
(en)
*
1965-05-10
1968-03-19
Ibm
Data processing system
1967
1967-07-29
GB
GB34961/67A
patent/GB1128576A/en
not_active
Expired
1968
1968-06-26
FR
FR1574247D
patent/FR1574247A/fr
not_active
Expired
1968-07-01
US
US741701A
patent/US3593304A/en
not_active
Expired – Lifetime
1968-07-26
DE
DE19681774606
patent/DE1774606B1/en
not_active
Withdrawn
Also Published As
Publication number
Publication date
FR1574247A
(en)
1969-07-11
US3593304A
(en)
1971-07-13
DE1774606B1
(en)
1972-04-27
Similar Documents
Publication
Publication Date
Title
GB1157323A
(en)
1969-07-09
Storage circuit
GB1398652A
(en)
1975-06-25
Digital storage systems
GB1530958A
(en)
1978-11-01
Interlaced memory matrix array having single transistor cells
GB1250109A
(en)
1971-10-20
GB1360585A
(en)
1974-07-17
Functional memories
GB1128576A
(en)
1968-09-25
Data store
GB849952A
(en)
1960-09-28
Static computer register and electronic data processing unit employing such register
GB1254722A
(en)
1971-11-24
Improved logical shifting devices
GB1116524A
(en)
1968-06-06
Information storage system
US3659274A
(en)
1972-04-25
Flow-through shifter
GB1486032A
(en)
1977-09-14
Associative data storage array
GB1422819A
(en)
1976-01-28
Matrix data manipulator
GB1334307A
(en)
1973-10-17
Monolithic memory system
GB1254929A
(en)
1971-11-24
Improvements in or relating to digital computers
GB1327575A
(en)
1973-08-22
Shift register
GB1052290A
(en)
US3231867A
(en)
1966-01-25
Dynamic data storage circuit
US3324456A
(en)
1967-06-06
Binary counter
US4138739A
(en)
1979-02-06
Schottky bipolar two-port random-access memory
GB1468753A
(en)
1977-03-30
Associative memory
GB1206701A
(en)
1970-09-30
Shift registers
GB1161653A
(en)
1969-08-20
Bidirectional Distribution System
GB1424822A
(en)
1976-02-11
Recirculatory memory
KR850008238A
(en)
1985-12-13
Semiconductor memory
GB1484941A
(en)
1977-09-08
High density high speed random access memory device
None