GB1205470A – Improvements to electric scanners
– Google Patents
GB1205470A – Improvements to electric scanners
– Google Patents
Improvements to electric scanners
Info
Publication number
GB1205470A
GB1205470A
GB5776768A
GB5776768A
GB1205470A
GB 1205470 A
GB1205470 A
GB 1205470A
GB 5776768 A
GB5776768 A
GB 5776768A
GB 5776768 A
GB5776768 A
GB 5776768A
GB 1205470 A
GB1205470 A
GB 1205470A
Authority
GB
United Kingdom
Prior art keywords
column
address
matrix
section
energized
Prior art date
1967-12-07
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5776768A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1967-12-07
Filing date
1968-12-05
Publication date
1970-09-16
1968-12-05
Application filed by International Standard Electric Corp
filed
Critical
International Standard Electric Corp
1970-09-16
Publication of GB1205470A
publication
Critical
patent/GB1205470A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04Q—SELECTING
H04Q3/00—Selecting arrangements
H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
H04Q3/54575—Software application
H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis
Abstract
1,205,470. Telephone exchange apparatus. INTERNATIONAL STANDARD ELECTRIC CORP. 5 Dec., 1968 [7 Dec., 1967], No. 57767/68. Heading H4K. A scanning system comprises contacts indicating the states of engagement of both sides of exchange junctors and arranged as crosspoints of a matrix. Current supplied to a column wire of the matrix in accordance with address data allowing the rows of the matrix to exhibit the states of the group of junctor contacts appearing in the column, the rows of the matrix being selectively gated one section at a time in accordance with address data to provide output indicative of the states of a section of the junctor group, a column of the matrix continuing to be energized after a section of its associated group has been read, the identity of the energized column being recorded for comparison with the address data received in connection with the next appearing read out instruction so that if a section in the same column needs to be interrogated that column stands ready and time is saved by discarding the routine of column selection and energization. A section of a group comprises a set of 16 contacts serving a corresponding set of 8 junctors. The scanning system may comprise a number of such matrices; address data from a computer processing calls indicating the matrix and column of a wanted group section. The address data is placed in a register along with a start bit which steps a 16-bit sequence counter off normal. If the register holding the address of the last matrix and matrix column interrogated agrees with the corresponding part of the address delivered from the processor, the address of the wanted section is applied promptly to gate the states of the associated junctors to a common 16 wire output. In this process the sequence counter steps under clock pulse drive and without hindrance until it returns to its zero stand-by state. On its 15th step the counter erases the start bit from the address register. The processor scans the start bit periodically and when it finds the bit reset it collects the data presented on the common output. If the register holding the address of the matrix and column last interrogated does not agree with the corresponding part of the address delivered from the processor, the column being energized is disconnected and the column required by the new address is connected up and energized with the sequence counter advancing with delays introduced in its second and third steps to enable the current to establish itself in the newly energized column circuit. At the 14th step the sequence counter gates the identity of the new column into the register recording the last column to be interrogated. The address of a matrix column is decoded to pulse the gate electrode of a silicon controlled rectifier over which the column circuit is energized, Fig. 3 (not shown). The control circuitry for handling the address data from the processor comprises NAND circuits, Fig. 4 (not shown. An algorithm for the processor in handling the sequential scanning of junctor sections with interrupts for detected changes of state is given with reference to Figs. 5 and 6 (not shown)
GB5776768A
1967-12-07
1968-12-05
Improvements to electric scanners
Expired
GB1205470A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
FR131311
1967-12-07
Publications (1)
Publication Number
Publication Date
GB1205470A
true
GB1205470A
(en)
1970-09-16
Family
ID=8642867
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB5776768A
Expired
GB1205470A
(en)
1967-12-07
1968-12-05
Improvements to electric scanners
Country Status (4)
Country
Link
CH
(1)
CH490774A
(en)
DE
(1)
DE1812020A1
(en)
FR
(1)
FR1568825A
(en)
GB
(1)
GB1205470A
(en)
1967
1967-12-07
FR
FR1568825D
patent/FR1568825A/fr
not_active
Expired
1968
1968-11-30
DE
DE19681812020
patent/DE1812020A1/en
active
Pending
1968-12-04
CH
CH1809068A
patent/CH490774A/en
not_active
IP Right Cessation
1968-12-05
GB
GB5776768A
patent/GB1205470A/en
not_active
Expired
Also Published As
Publication number
Publication date
DE1812020A1
(en)
1969-07-17
CH490774A
(en)
1970-05-15
FR1568825A
(en)
1969-05-30
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Legal Events
Date
Code
Title
Description
1971-01-27
PS
Patent sealed
1974-12-11
435
Patent endorsed ‘licences of right’ on the date specified (sect. 35/1949)
1977-07-06
PLNP
Patent lapsed through nonpayment of renewal fees
