GB1383297A – Electrical integrated circuit package
– Google Patents
GB1383297A – Electrical integrated circuit package
– Google Patents
Electrical integrated circuit package
Info
Publication number
GB1383297A
GB1383297A
GB825772A
GB825772A
GB1383297A
GB 1383297 A
GB1383297 A
GB 1383297A
GB 825772 A
GB825772 A
GB 825772A
GB 825772 A
GB825772 A
GB 825772A
GB 1383297 A
GB1383297 A
GB 1383297A
Authority
GB
United Kingdom
Prior art keywords
contacts
bonded
chip
cover
base
Prior art date
1972-02-23
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB825772A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co Ltd
Original Assignee
Plessey Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1972-02-23
Filing date
1972-02-23
Publication date
1974-02-12
1972-02-23
Application filed by Plessey Co Ltd
filed
Critical
Plessey Co Ltd
1972-02-23
Priority to GB825772A
priority
Critical
patent/GB1383297A/en
1973-01-30
Priority to US00327904A
priority
patent/US3825801A/en
1973-02-08
Priority to DE2306288A
priority
patent/DE2306288C2/en
1973-02-22
Priority to FR7306328A
priority
patent/FR2173192B1/fr
1973-02-22
Priority to SE7302503A
priority
patent/SE380421B/en
1973-02-22
Priority to IT20733/73A
priority
patent/IT979383B/en
1974-02-12
Publication of GB1383297A
publication
Critical
patent/GB1383297A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
H01L23/495—Lead-frames or other flat leads
H01L23/49541—Geometry of the lead-frame
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, «first-level» interconnects; Manufacturing methods related thereto
H01L2224/42—Wire connectors; Manufacturing methods related thereto
H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
H01L2224/481—Disposition
H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, «first-level» interconnects; Manufacturing methods related thereto
H01L2224/42—Wire connectors; Manufacturing methods related thereto
H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
H01L2224/484—Connecting portions
H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, «first-level» interconnects; Manufacturing methods related thereto
H01L24/42—Wire connectors; Manufacturing methods related thereto
H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/0001—Technical content checked by a classifier
H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/01—Chemical elements
H01L2924/01019—Potassium [K]
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/01—Chemical elements
H01L2924/01039—Yttrium [Y]
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/01—Chemical elements
H01L2924/01078—Platinum [Pt]
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/01—Chemical elements
H01L2924/01079—Gold [Au]
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/013—Alloys
H01L2924/0132—Binary Alloys
H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/10—Details of semiconductor or other solid state devices to be connected
H01L2924/11—Device type
H01L2924/14—Integrated circuits
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
H01L2924/161—Cap
H01L2924/1615—Shape
H01L2924/16195—Flat cap [not enclosing an internal cavity]
Abstract
1383297 Semi-conductor mountings PLESSEY CO Ltd 24 Jan 1973 [23 Feb 1972] 8257/72 Heading H1K A semi-conductor package is constructed from a sheet of, e.g. beryllium copper processed into a patterned frame (Fig. 1) wherein attach pads 1 are positioned along the sides of a square abcd and corresponding contacts 2 are arranged in rows extending parallel to opposite sides of the square and are connected over 3 to the contacts. A marginal band 4 encloses the contacts, and with the square abcd is eventually removed by cropping. Stubs 5 with locating holes 6 extend inwardly from the band 4. Pads 1 are dimensioned to register with conductive areas of an integrated circuit chip to be included in the package, and contacts 2 are dimensioned to register with contact areas of a printed circuit mounting board. The’contacts and pads are plated, e.g. with Au and shaped to present a double crested configuration (Fig. 4b) and the frame is bonded to an insulant cover 9 having windows 10 admitting crests 7, 8 with locating holes registering with holes 6, and bonded by lines e, f, g, h. The cover may be of plastic, ceramic, or coated metal bonded by epoxy adhesive or solder glass. An insulant base 13 (Fig. 3) of similar material has locating holes 15 and a central cavity 14, and is bonded at its upper face to cover 9 with the integrated circuit chip 12 received in the cavity and connected by contacts 2. After cropping marginal band 4 the package is as shown in Fig. 4b. A printed circuit board 16 (Fig. 4a) has locating holes 17 registering with holes 6, 11, 15 and carries contacts 18 positioned to engage crests 7, 8 of a conductor 2; the package being secured thereto by bolts and nuts through the aligned holes. Alternatively the frame may be bonded to the base before bonding on the cover, the chip is inserted in the cavity and secured by conductive adhesive or bonding to a fold layer of the base, and the attachment pads may be connected to the chip contacts by wire bonds; after which cover 9 is bonded on with recesses in the underside clearing the wires (Fig. 6, not shown). A thermally conducting fastener having two studs registering with the holes and carried by a strip may be moulded into the bore; the studs replacing the bolts to secure the package, while the fastener is epoxy or eutectic bonded to the chip to dissipate heat. Alternatively the chip may be encapsulated with the fastener strip in a plastic moulding. In a modification (Fig. 6, not shown) the cavity may penetrate the entire thickness of the base as a circular tapered aperture, and the conductors may be cranked to lie in a depression of the base surrounding the aperture, in which a spacer supports the attach pads. The chip is positioned on the undersurface of cover 9 with conductive areas on its lower face connected by bond wires to the attach pads. The aperture is closed by a lid at the underside of the base.
GB825772A
1972-02-23
1972-02-23
Electrical integrated circuit package
Expired
GB1383297A
(en)
Priority Applications (6)
Application Number
Priority Date
Filing Date
Title
GB825772A
GB1383297A
(en)
1972-02-23
1972-02-23
Electrical integrated circuit package
US00327904A
US3825801A
(en)
1972-02-23
1973-01-30
Electrical integrated circuit package
DE2306288A
DE2306288C2
(en)
1972-02-23
1973-02-08
Integrated circuit carrier
FR7306328A
FR2173192B1
(en)
1972-02-23
1973-02-22
SE7302503A
SE380421B
(en)
1972-02-23
1973-02-22
BERORGAN FOR A DISC WITH ELECTRIC, INTEGRATED CIRCUIT
IT20733/73A
IT979383B
(en)
1972-02-23
1973-02-22
SUPPORT COMPLEX FOR INTEGRATED ELECTRICAL CIRCUITS
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
GB825772A
GB1383297A
(en)
1972-02-23
1972-02-23
Electrical integrated circuit package
Publications (1)
Publication Number
Publication Date
GB1383297A
true
GB1383297A
(en)
1974-02-12
Family
ID=9849039
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB825772A
Expired
GB1383297A
(en)
1972-02-23
1972-02-23
Electrical integrated circuit package
Country Status (6)
Country
Link
US
(1)
US3825801A
(en)
DE
(1)
DE2306288C2
(en)
FR
(1)
FR2173192B1
(en)
GB
(1)
GB1383297A
(en)
IT
(1)
IT979383B
(en)
SE
(1)
SE380421B
(en)
Cited By (5)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
DE2931449A1
(en)
*
1978-08-02
1980-02-21
Hitachi Ltd
LINE FRAME AND SEMICONDUCTOR DEVICE USING THE SAME
GB2140205A
(en)
*
1983-05-18
1984-11-21
Rollin Woodruff Mettler
Integrated circuit module and method of making same
US4829362A
(en)
*
1986-04-28
1989-05-09
Motorola, Inc.
Lead frame with die bond flag for ceramic packages
GB2213319A
(en)
*
1987-12-04
1989-08-09
Marconi Electronic Devices
A method of forming electrical conductors on an insulating substrate
US5550402A
(en)
*
1992-11-27
1996-08-27
Esec Sempac S.A.
Electronic module of extra-thin construction
Families Citing this family (9)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3984620A
(en)
*
1975-06-04
1976-10-05
Raytheon Company
Integrated circuit chip test and assembly package
US4064356A
(en)
*
1976-03-11
1977-12-20
Sander Associates, Inc.
Soldered joint
US4295181A
(en)
*
1979-01-15
1981-10-13
Texas Instruments Incorporated
Module for an integrated circuit system
JPS5817649A
(en)
*
1981-07-24
1983-02-01
Fujitsu Ltd
Package for electronic part
US4597617A
(en)
*
1984-03-19
1986-07-01
Tektronix, Inc.
Pressure interconnect package for integrated circuits
JPS61203695A
(en)
*
1985-03-06
1986-09-09
シャープ株式会社
Part mounting system for single-side wiring board
DE3723209A1
(en)
*
1987-07-14
1989-01-26
Semikron Elektronik Gmbh
Semiconductor arrangement
DE10006445C2
(en)
*
2000-02-14
2002-03-28
Infineon Technologies Ag
Intermediate frame for a housing frame of semiconductor chips
US7993092B2
(en)
*
2007-08-14
2011-08-09
Samsung Electronics Co., Ltd.
Moving carrier for lead frame and method of moving lead frame using the moving carrier
Family Cites Families (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3205408A
(en)
*
1964-04-14
1965-09-07
Boehm Josef
Components for printed circuits
US3407925A
(en)
*
1965-03-19
1968-10-29
Elco Corp
Microelectronic carrier
US3381372A
(en)
*
1966-07-13
1968-05-07
Sperry Rand Corp
Method of electrically connecting and hermetically sealing packages for microelectronic circuits
1972
1972-02-23
GB
GB825772A
patent/GB1383297A/en
not_active
Expired
1973
1973-01-30
US
US00327904A
patent/US3825801A/en
not_active
Expired – Lifetime
1973-02-08
DE
DE2306288A
patent/DE2306288C2/en
not_active
Expired
1973-02-22
SE
SE7302503A
patent/SE380421B/en
unknown
1973-02-22
FR
FR7306328A
patent/FR2173192B1/fr
not_active
Expired
1973-02-22
IT
IT20733/73A
patent/IT979383B/en
active
Cited By (7)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
DE2931449A1
(en)
*
1978-08-02
1980-02-21
Hitachi Ltd
LINE FRAME AND SEMICONDUCTOR DEVICE USING THE SAME
US4301464A
(en)
*
1978-08-02
1981-11-17
Hitachi, Ltd.
Lead frame and semiconductor device employing the same with improved arrangement of supporting leads for securing the semiconductor supporting member
GB2140205A
(en)
*
1983-05-18
1984-11-21
Rollin Woodruff Mettler
Integrated circuit module and method of making same
US4829362A
(en)
*
1986-04-28
1989-05-09
Motorola, Inc.
Lead frame with die bond flag for ceramic packages
GB2213319A
(en)
*
1987-12-04
1989-08-09
Marconi Electronic Devices
A method of forming electrical conductors on an insulating substrate
GB2213319B
(en)
*
1987-12-04
1991-03-06
Marconi Electronic Devices
A method of forming electrical conductors
US5550402A
(en)
*
1992-11-27
1996-08-27
Esec Sempac S.A.
Electronic module of extra-thin construction
Also Published As
Publication number
Publication date
SE380421B
(en)
1975-11-03
US3825801A
(en)
1974-07-23
DE2306288A1
(en)
1973-08-30
FR2173192A1
(en)
1973-10-05
DE2306288C2
(en)
1982-09-09
IT979383B
(en)
1974-09-30
FR2173192B1
(en)
1977-04-22
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Legal Events
Date
Code
Title
Description
1975-06-25
PS
Patent sealed [section 19, patents act 1949]
1985-09-18
PCNP
Patent ceased through non-payment of renewal fee
