GB1462617A

GB1462617A – Analogue to digital converters
– Google Patents

GB1462617A – Analogue to digital converters
– Google Patents
Analogue to digital converters

Info

Publication number
GB1462617A

GB1462617A
GB2151373A
GB2151373A
GB1462617A
GB 1462617 A
GB1462617 A
GB 1462617A
GB 2151373 A
GB2151373 A
GB 2151373A
GB 2151373 A
GB2151373 A
GB 2151373A
GB 1462617 A
GB1462617 A
GB 1462617A
Authority
GB
United Kingdom
Prior art keywords
integrator
circuit
counter
mode
voltage
Prior art date
1973-05-05
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)

Expired

Application number
GB2151373A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Gemalto Terminals Ltd

Original Assignee
Solartron Electronic Group Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-05-05
Filing date
1973-05-05
Publication date
1977-01-26

1973-05-05
Application filed by Solartron Electronic Group Ltd
filed
Critical
Solartron Electronic Group Ltd

1973-05-05
Priority to GB2151373A
priority
Critical
patent/GB1462617A/en

1974-04-30
Priority to DE2420857A
priority
patent/DE2420857A1/en

1974-05-03
Priority to FR7415353A
priority
patent/FR2228326B1/fr

1974-05-03
Priority to NL7405943A
priority
patent/NL7405943A/xx

1974-05-04
Priority to JP49050211A
priority
patent/JPS5017569A/ja

1977-01-26
Publication of GB1462617A
publication
Critical
patent/GB1462617A/en

Status
Expired
legal-status
Critical
Current

Links

Espacenet

Global Dossier

Discuss

Classifications

H—ELECTRICITY

H03—ELECTRONIC CIRCUITRY

H03M—CODING; DECODING; CODE CONVERSION IN GENERAL

H03M1/00—Analogue/digital conversion; Digital/analogue conversion

H03M1/12—Analogue/digital converters

H03M1/50—Analogue/digital converters with intermediate conversion to time interval

Abstract

1462617 Analogue to digital converter SOLARTRON ELECTRONIC GROUP Ltd 1 May 1974 [5 May 1973 (2)] 21513/73 and 21514/73 Heading H3H In a dual ramp analogue to digital converter for A.C. or D.C. with an unwanted periodic noise signal, the duration of the ramp for which the unknown voltage is applied is made equal to an integral number of cycles of the A.C. or periodic noise. The integrator operates in two modes. The first mode has time constant T 1 and integrates both A.C. and D.C. while the second mode has time constant T 2 and integrates A.C. only. The system is initially in the first mode, and integrates the unknown voltage for fixed time T 2 in the first mode and then switches to the second mode until the end of the next A.C. cycle. These together constitute the up ramp. The down ramp is generated by a reference voltage and the digital signal is derived from its duration. As shown, the unknown voltage is applied at 10, S A being closed to short out Cin for a D.C. voltage. The A.C. component passes C 2 to threshold circuit 32 which has an output whenever the voltage at 31 is greater than Œ#. The threshold circuit output is supplied to anti-jitter circuit 36 which is also supplied with clock pulses from 40. The circuit 36 cleans up the edges of square wave pulses which result from the threshold circuit. The output of the anti-jitter circuit sets bistables 52 and 54, permitting clock pulses to pass gate 74 to counter 70 and enabling gate 58 so that square pulses from the threshold circuit operate switch S 1 and function as a synchronous rectifier supplying A.C. to the integrator 16. With a D.C. input, switch 66 is against contact 64 and switch S1 is permanently closed. When counter 70 is full (6000), bi-stable 80 is set and closes S2 to change the integrator time constant to T 2 . At the next pulse from the antijitter circuit 36, bi-stables 80 and 54 are reset, bi-stable 88 is set and the set output of this bistable resets bi-stables 52 which renders S1 inoperative via gate 58 and resets counter 70. S3 is also closed by bi-stable 88 applying reference voltage 24 to the integrator which now has time constant T 1 . Clock pulses pass via gate 74 to the counter until the input of comparator 28 reaches zero when bi-stable 88 is reset, gate 74 closed and the counter reading transferred to display 94. In an alternative embodiment a rectifier may be incorporated in series with the integrator capacitor C1.

GB2151373A
1973-05-05
1973-05-05
Analogue to digital converters

Expired

GB1462617A
(en)

Priority Applications (5)

Application Number
Priority Date
Filing Date
Title

GB2151373A

GB1462617A
(en)

1973-05-05
1973-05-05
Analogue to digital converters

DE2420857A

DE2420857A1
(en)

1973-05-05
1974-04-30

INTEGRATING ANALOG-DIGITAL CONVERTER

FR7415353A

FR2228326B1
(en)

1973-05-05
1974-05-03

NL7405943A

NL7405943A
(en)

1973-05-05
1974-05-03

JP49050211A

JPS5017569A
(en)

1973-05-05
1974-05-04

Applications Claiming Priority (2)

Application Number
Priority Date
Filing Date
Title

GB2151473

1973-05-05

GB2151373A

GB1462617A
(en)

1973-05-05
1973-05-05
Analogue to digital converters

Publications (1)

Publication Number
Publication Date

GB1462617A
true

GB1462617A
(en)

1977-01-26

Family
ID=26255371
Family Applications (1)

Application Number
Title
Priority Date
Filing Date

GB2151373A
Expired

GB1462617A
(en)

1973-05-05
1973-05-05
Analogue to digital converters

Country Status (5)

Country
Link

JP
(1)

JPS5017569A
(en)

DE
(1)

DE2420857A1
(en)

FR
(1)

FR2228326B1
(en)

GB
(1)

GB1462617A
(en)

NL
(1)

NL7405943A
(en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

DE2456156C2
(en)

*

1973-11-28
1984-10-31
Kabushiki Kaisha Suwa Seikosha, Shinjuku, Tokio/Tokyo

Analog-to-digital converter

CH652876A5
(en)

*

1980-08-04
1985-11-29
Bbc Brown Boveri & Cie
Method and device for analog-digital conversion of an electrical measured value with changeable conversion ratio

JPS59157323A
(en)

*

1983-02-23
1984-09-06
Kuraray Co Ltd
Manufacture of artificial fiber

JPS6074820A
(en)

*

1983-09-30
1985-04-27
Toshiba Corp
Analog/digital converter

HU190508B
(en)

*

1983-10-07
1986-09-29
Mta Koezponti Fizikai Kutato Intezete,Hu
Circuit arrangement for forming current-to-pulse converter with variable time constant

JP2613903B2
(en)

*

1987-12-21
1997-05-28
日本電気アイシーマイコンシステム株式会社

Integral type analog-digital converter

FR3056970B1
(en)

2016-09-30
2020-09-18
C E R M E X Constructions Etudes Et Rech De Materiels Pour Lemballage Dexpedition

OBJECT DISTRIBUTION SYSTEM

Family Cites Families (2)

* Cited by examiner, † Cited by third party

Publication number
Priority date
Publication date
Assignee
Title

GB1153201A
(en)

*

1966-04-30
1969-05-29
Fenlow Electronics Ltd
Improvements in or relating to Apparatus for Measuring the Voltage of a D.C. Component in an Electrical Voltage

US3624643A
(en)

*

1969-09-17
1971-11-30
Peter L Richman
Signal-to-time converter

1973

1973-05-05
GB
GB2151373A
patent/GB1462617A/en
not_active
Expired

1974

1974-04-30
DE
DE2420857A
patent/DE2420857A1/en
active
Pending

1974-05-03
FR
FR7415353A
patent/FR2228326B1/fr
not_active
Expired

1974-05-03
NL
NL7405943A
patent/NL7405943A/xx
unknown

1974-05-04
JP
JP49050211A
patent/JPS5017569A/ja
active
Pending

Also Published As

Publication number
Publication date

JPS5017569A
(en)

1975-02-24

FR2228326B1
(en)

1978-08-04

FR2228326A1
(en)

1974-11-29

NL7405943A
(en)

1974-11-07

DE2420857A1
(en)

1974-11-21

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Legal Events

Date
Code
Title
Description

1977-06-10
PS
Patent sealed

1982-12-01
PCNP
Patent ceased through non-payment of renewal fee

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