GB1466915A – Magnetic record reading circuitry
– Google Patents
GB1466915A – Magnetic record reading circuitry
– Google Patents
Magnetic record reading circuitry
Info
Publication number
GB1466915A
GB1466915A
GB3118674A
GB3118674A
GB1466915A
GB 1466915 A
GB1466915 A
GB 1466915A
GB 3118674 A
GB3118674 A
GB 3118674A
GB 3118674 A
GB3118674 A
GB 3118674A
GB 1466915 A
GB1466915 A
GB 1466915A
Authority
GB
United Kingdom
Prior art keywords
pulse
stable
pulses
data
timing
Prior art date
1973-07-19
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3118674A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1973-07-19
Filing date
1974-07-15
Publication date
1977-03-09
1974-07-15
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc
filed
Critical
Honeywell Information Systems Italia SpA
1977-03-09
Publication of GB1466915A
publication
Critical
patent/GB1466915A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G11—INFORMATION STORAGE
G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
G11B20/10—Digital recording or reproducing
G11B20/10009—Improvement or modification of read or write signals
G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
G11B20/10212—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter compensation for data shift, e.g. pulse-crowding effects
Abstract
1466915 Data storage systems HONEYWELL INFORMATION SYSTEMS Inc 15 July 1974 [19 July 1973] 31186/74 Heading G4C A circuit for retiming data pulses read from a magnetic record includes means for defining timing periods which are synchronized with the nominal positions of data bit cells containing the pulses and each of which encompasses a nominally fixed point at which the respective pulse occurs. A bi-stable is provided in respect of each fixed point. It is set in response to a data pulse occurring within the corresponding timing period and is reset at the end of the period. The resetting of the bi-stable results in the generation of a retimed data pulse. If the data is recorded such that there is a flux reversal at the centre of a bit cell of one state and at the start of the second of two adjacent cells of the other state, i.e. such that there are two fixed points, two bi-stables are required, as shown at 58, 64, Fig. 2. For a binary data sequence as at the top of Fig. 3 the read head output will be as B. The broken line portions of Fig. 3 illustrate the operation when the flux reversals are displaced from the nominal positions. Circuits, not described, produce data pulse train C, in which there is a pulse at each peak in B, and from C two timing pulse trains D, E which define the timing periods. Bi-stable 38 produces complementary timing pulse trains F and G from D. Pulses C are delayed at 40 by the amount necessary to bring them to the nominal centres of pulses F. The resulting pulses H pass via AND gate 50, when enabled by J, to cause bi-stable 58 to assume the state of the signal F on its D input. The output I of the bi-stable 58 goes high if a 1-bit is being read, i.e. if pulse 26 is nominally at the centre of its bit cell. The periods t 1 -t 2 and t 3 -t 4 are the switching times of the bi-stable. Signal I is ANDed at 66 with G and E so that O goes high, representing a retimed pulse, at the end of a timing period defined by E. Signal I is also ANDed with G and E at 68, the resulting pulse 74 causing bistable 58 to assume the state of F, now low, on its D input and therefore pulses 70, 74 to end. The other bi-stable 64 responds similarly but only in respect of flux reversals nominally at the start of a bit cell.
GB3118674A
1973-07-19
1974-07-15
Magnetic record reading circuitry
Expired
GB1466915A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
US00380809A
US3831194A
(en)
1973-07-19
1973-07-19
Digital data recovery system with circuitry which corrects for peak shifting
Publications (1)
Publication Number
Publication Date
GB1466915A
true
GB1466915A
(en)
1977-03-09
Family
ID=23502530
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB3118674A
Expired
GB1466915A
(en)
1973-07-19
1974-07-15
Magnetic record reading circuitry
Country Status (6)
Country
Link
US
(1)
US3831194A
(en)
JP
(1)
JPS5853402B2
(en)
CA
(1)
CA1034254A
(en)
DE
(1)
DE2433365A1
(en)
FR
(1)
FR2238204B1
(en)
GB
(1)
GB1466915A
(en)
Cited By (2)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2205467A
(en)
*
1987-05-28
1988-12-07
Apple Computer
Disk drive controller
US5151985A
(en)
*
1987-05-28
1992-09-29
Apple Computer, Inc.
Disk drive controller
Families Citing this family (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3893171A
(en)
*
1974-03-25
1975-07-01
Ibm
Signal adjustment circuit
US4580176A
(en)
*
1983-11-21
1986-04-01
International Business Machines Corporation
Adaptive equalization circuit for magnetic recording channels utilizing signal timing
US5274569A
(en)
*
1991-10-15
1993-12-28
International Business Machines Corporation
Dual sense non-differencing digital peak detector
Family Cites Families (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3503059A
(en)
*
1967-03-22
1970-03-24
Ibm
Pulse crowding compensation for magnetic recording
US3643228A
(en)
*
1969-10-27
1972-02-15
Honeywell Inf Systems
High-density storage and retrieval system
US3656149A
(en)
*
1970-11-23
1972-04-11
Honeywell Inf Systems
Three frequency data separator
1973
1973-07-19
US
US00380809A
patent/US3831194A/en
not_active
Expired – Lifetime
1974
1974-05-03
CA
CA198,892A
patent/CA1034254A/en
not_active
Expired
1974-07-10
JP
JP49079030A
patent/JPS5853402B2/en
not_active
Expired
1974-07-11
DE
DE2433365A
patent/DE2433365A1/en
active
Pending
1974-07-15
GB
GB3118674A
patent/GB1466915A/en
not_active
Expired
1974-07-16
FR
FR7424617A
patent/FR2238204B1/fr
not_active
Expired
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
GB2205467A
(en)
*
1987-05-28
1988-12-07
Apple Computer
Disk drive controller
GB2205467B
(en)
*
1987-05-28
1992-02-12
Apple Computer
Disk drive controller
US5151985A
(en)
*
1987-05-28
1992-09-29
Apple Computer, Inc.
Disk drive controller
Also Published As
Publication number
Publication date
DE2433365A1
(en)
1975-04-17
JPS5853402B2
(en)
1983-11-29
FR2238204B1
(en)
1978-01-20
FR2238204A1
(en)
1975-02-14
US3831194A
(en)
1974-08-20
CA1034254A
(en)
1978-07-04
JPS5039917A
(en)
1975-04-12
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Legal Events
Date
Code
Title
Description
1977-07-20
PS
Patent sealed [section 19, patents act 1949]
1979-02-21
PCNP
Patent ceased through non-payment of renewal fee
