GB1487522A – Fet circuits
– Google Patents
GB1487522A – Fet circuits
– Google Patents
Fet circuits
Info
Publication number
GB1487522A
GB1487522A
GB5939/76A
GB593976A
GB1487522A
GB 1487522 A
GB1487522 A
GB 1487522A
GB 5939/76 A
GB5939/76 A
GB 5939/76A
GB 593976 A
GB593976 A
GB 593976A
GB 1487522 A
GB1487522 A
GB 1487522A
Authority
GB
United Kingdom
Prior art keywords
transistors
transistor
latching
field effect
circuit
Prior art date
1975-04-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5939/76A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1975-04-29
Filing date
1976-02-16
Publication date
1977-10-05
1976-02-16
Application filed by International Business Machines Corp
filed
Critical
International Business Machines Corp
1977-10-05
Publication of GB1487522A
publication
Critical
patent/GB1487522A/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03K—PULSE TECHNIQUE
H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
H03K3/356—Bistable circuits
H03K3/356017—Bistable circuits using additional transistors in the input circuit
Abstract
1487522 Transistor bi-stable circuits INTERNATIONAL BUSINESS MACHINES CORP 16 Feb 1976 [29 April 1975] 05939/76 Heading H3T In a latching driver circuit comprising a latching circuit connected to a push-pull driver circuit, and means for setting the latching circuit to the appropriate one or other of its latching states in accordance with input signals, the latching circuit comprises two cross-coupled inverter circuits each comprising a depletion mode field effect transistor D1, D2 acting as a load and connected in series with an enhancement mode field effect transistor E1, E2, the drains of the two depletion mode transistors being connected, in use, to a reference drain voltage V DD and the sources of the two enhancement mode transistors being connected to a reference source voltage (earth), the four field effect transistors being of the same channel conductivity type, and the push-pull driver circuit comprises a depletion mode transistor D3 connected in series with an enhancement mode field effect transistor E3 across a source of output voltage, the two transistors of the driver circuit being of the same channel conductivity type, the gate of the driver depletion mode transistor being connected to the series connection NODE 1 between the transistors of one inverter circuit and the gate of the drive enhancement mode transistor being connected to the series connection NODE 2 between the transistors of the other inverter circuit. Where one node of the latch drives an output node a high switching speed may be retained without increasing the quiescent power dissipation by adjusting the dimension ratios of the transistors in the two arms of the bi-stable. This also gives independent adjustment of the rise and fall switching times.
GB5939/76A
1975-04-29
1976-02-16
Fet circuits
Expired
GB1487522A
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
US05/572,761
US4004170A
(en)
1975-04-29
1975-04-29
MOSFET latching driver
Publications (1)
Publication Number
Publication Date
GB1487522A
true
GB1487522A
(en)
1977-10-05
Family
ID=24289249
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB5939/76A
Expired
GB1487522A
(en)
1975-04-29
1976-02-16
Fet circuits
Country Status (3)
Country
Link
US
(1)
US4004170A
(en)
JP
(1)
JPS51132953A
(en)
GB
(1)
GB1487522A
(en)
Families Citing this family (8)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US4333025A
(en)
*
1978-03-13
1982-06-01
Texas Instruments Incorporated
N-Channel MOS comparator
JPS5931155B2
(en)
*
1979-10-11
1984-07-31
インターナシヨナルビジネス マシーンズ コーポレーシヨン
sense amplifier circuit
US4395645A
(en)
*
1980-12-05
1983-07-26
International Telephone And Telegraph Corporation
Mosfet logic inverter buffer circuit for integrated circuits
US4447746A
(en)
*
1981-12-31
1984-05-08
International Business Machines Corporation
Digital photodetectors
US4490630A
(en)
*
1982-06-30
1984-12-25
International Business Machines Corporation
Current switch emitter follower with current mirror coupled push-pull output stage
JPS6049443A
(en)
*
1983-08-01
1985-03-18
インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション
Programmable latch circuit
DE3685026D1
(en)
*
1986-07-09
1992-05-27
Itt Ind Gmbh Deutsche
CLOCKED CMOS SWITCHING WITH AT LEAST ONE CMOS SWITCH.
US6331794B1
(en)
*
1999-03-10
2001-12-18
Richard A. Blanchard
Phase leg with depletion-mode device
Family Cites Families (6)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3697775A
(en)
*
1971-04-21
1972-10-10
Signetics Corp
Three state output logic circuit with bistable inputs
US3778783A
(en)
*
1971-11-29
1973-12-11
Mostek Corp
Dynamic random access memory
US3775693A
(en)
*
1971-11-29
1973-11-27
Moskek Co
Mosfet logic inverter for integrated circuits
US3870901A
(en)
*
1973-12-10
1975-03-11
Gen Instrument Corp
Method and apparatus for maintaining the charge on a storage node of a mos circuit
US3893087A
(en)
*
1974-02-08
1975-07-01
Gen Instrument Corp
Random access memory with shared column conductors
US3902082A
(en)
*
1974-02-11
1975-08-26
Mostek Corp
Dynamic data input latch and decoder
1975
1975-04-29
US
US05/572,761
patent/US4004170A/en
not_active
Expired – Lifetime
1976
1976-02-16
GB
GB5939/76A
patent/GB1487522A/en
not_active
Expired
1976-03-26
JP
JP51032718A
patent/JPS51132953A/en
active
Pending
Also Published As
Publication number
Publication date
US4004170A
(en)
1977-01-18
JPS51132953A
(en)
1976-11-18
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Legal Events
Date
Code
Title
Description
1978-02-15
PS
Patent sealed [section 19, patents act 1949]
1981-09-30
PCNP
Patent ceased through non-payment of renewal fee
