GB2016180A – Solid state mass memory
– Google Patents
GB2016180A – Solid state mass memory
– Google Patents
Solid state mass memory
Info
Publication number
GB2016180A
GB2016180A
GB7908282A
GB7908282A
GB2016180A
GB 2016180 A
GB2016180 A
GB 2016180A
GB 7908282 A
GB7908282 A
GB 7908282A
GB 7908282 A
GB7908282 A
GB 7908282A
GB 2016180 A
GB2016180 A
GB 2016180A
Authority
GB
United Kingdom
Prior art keywords
solid state
mass memory
state mass
memory
solid
Prior art date
1978-03-09
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7908282A
Other versions
GB2016180B
(en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telecom Italia SpA
Original Assignee
CSELT Centro Studi e Laboratori Telecomunicazioni SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
1978-03-09
Filing date
1979-03-08
Publication date
1979-09-19
1979-03-08
Application filed by CSELT Centro Studi e Laboratori Telecomunicazioni SpA
filed
Critical
CSELT Centro Studi e Laboratori Telecomunicazioni SpA
1979-09-19
Publication of GB2016180A
publication
Critical
patent/GB2016180A/en
1982-06-09
Application granted
granted
Critical
1982-06-09
Publication of GB2016180B
publication
Critical
patent/GB2016180B/en
Status
Expired
legal-status
Critical
Current
Links
Espacenet
Global Dossier
Discuss
Classifications
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F11/00—Error detection; Error correction; Monitoring
G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9’s or 11’s
G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9’s or 11’s in individual solid state devices
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F11/00—Error detection; Error correction; Monitoring
G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9’s or 11’s
G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
G—PHYSICS
G06—COMPUTING; CALCULATING OR COUNTING
G06F—ELECTRIC DIGITAL DATA PROCESSING
G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
G06F3/007—Digital input from or digital output to memories of the shift register type
G—PHYSICS
G11—INFORMATION STORAGE
G11C—STATIC STORES
G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
G11C19/287—Organisation of a multiplicity of shift registers
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04Q—SELECTING
H04Q3/00—Selecting arrangements
H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
H04Q3/54575—Software application
H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis
H—ELECTRICITY
H04—ELECTRIC COMMUNICATION TECHNIQUE
H04Q—SELECTING
H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
H04Q2213/13168—Error Correction
GB7908282A
1978-03-09
1979-03-08
Solid state mass memory
Expired
GB2016180B
(en)
Applications Claiming Priority (1)
Application Number
Priority Date
Filing Date
Title
IT67499/78A
IT1108375B
(en)
1978-03-09
1978-03-09
SOLID STATE GROUND MEMORY WITH SELF-CORRECTION AND ORGANIZED IN WORDS FOR A REGISTERED PROGRAM CONTROL SYSTEM
Publications (2)
Publication Number
Publication Date
GB2016180A
true
GB2016180A
(en)
1979-09-19
GB2016180B
GB2016180B
(en)
1982-06-09
Family
ID=11302932
Family Applications (1)
Application Number
Title
Priority Date
Filing Date
GB7908282A
Expired
GB2016180B
(en)
1978-03-09
1979-03-08
Solid state mass memory
Country Status (10)
Country
Link
US
(1)
US4216532A
(en)
JP
(1)
JPS54126434A
(en)
BE
(1)
BE874402A
(en)
BR
(1)
BR7901391A
(en)
CA
(1)
CA1114513A
(en)
DE
(1)
DE2909151C2
(en)
FR
(1)
FR2419563B1
(en)
GB
(1)
GB2016180B
(en)
IT
(1)
IT1108375B
(en)
NL
(1)
NL7901871A
(en)
Cited By (3)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
EP0006550A2
(en)
*
1978-06-28
1980-01-09
CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A.
Self-correcting and reconfigurable solid-state mass-memory organized in bits
GB2146148A
(en)
*
1983-09-02
1985-04-11
Wang Laboratories
Single in line memory module
GB2172126A
(en)
*
1985-01-24
1986-09-10
John Richard Mumford
Interchangeable solid state memory device
Families Citing this family (1)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US6842802B2
(en)
2001-11-30
2005-01-11
Aftg-Tg, L.L.C.
Programmatic time-gap defect correction apparatus and method
Family Cites Families (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
US3735105A
(en)
*
1971-06-11
1973-05-22
Ibm
Error correcting system and method for monolithic memories
US3953837A
(en)
*
1974-11-27
1976-04-27
Texas Instruments Incorporated
Dual serial-parallel-serial analog memory
DE2524802A1
(en)
*
1975-06-04
1976-12-16
Siemens Ag
Working memory arrangement for several different processes – employed in data processing installation of time sharing operational type
US4161788A
(en)
*
1977-04-21
1979-07-17
Texas Instruments Incorporated
Bubble memory controller with multipage data handling
1978
1978-03-09
IT
IT67499/78A
patent/IT1108375B/en
active
1979
1979-02-23
BE
BE193654A
patent/BE874402A/en
not_active
IP Right Cessation
1979-02-26
FR
FR7904801A
patent/FR2419563B1/fr
not_active
Expired
1979-03-02
US
US06/017,037
patent/US4216532A/en
not_active
Expired – Lifetime
1979-03-02
CA
CA322,714A
patent/CA1114513A/en
not_active
Expired
1979-03-07
BR
BR7901391A
patent/BR7901391A/en
unknown
1979-03-08
JP
JP2759079A
patent/JPS54126434A/en
active
Pending
1979-03-08
DE
DE2909151A
patent/DE2909151C2/en
not_active
Expired
1979-03-08
NL
NL7901871A
patent/NL7901871A/en
not_active
Application Discontinuation
1979-03-08
GB
GB7908282A
patent/GB2016180B/en
not_active
Expired
Cited By (4)
* Cited by examiner, † Cited by third party
Publication number
Priority date
Publication date
Assignee
Title
EP0006550A2
(en)
*
1978-06-28
1980-01-09
CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A.
Self-correcting and reconfigurable solid-state mass-memory organized in bits
EP0006550A3
(en)
*
1978-06-28
1980-06-25
Cselt Centro Studi E Laboratori Telecomunicazioni S.P.A.
Self-correcting, solid-state mass-memory organized by bits and with reconfiguration capability for a stored program control system
GB2146148A
(en)
*
1983-09-02
1985-04-11
Wang Laboratories
Single in line memory module
GB2172126A
(en)
*
1985-01-24
1986-09-10
John Richard Mumford
Interchangeable solid state memory device
Also Published As
Publication number
Publication date
GB2016180B
(en)
1982-06-09
FR2419563A1
(en)
1979-10-05
JPS54126434A
(en)
1979-10-01
FR2419563B1
(en)
1984-01-27
BR7901391A
(en)
1979-10-02
DE2909151C2
(en)
1983-06-09
US4216532A
(en)
1980-08-05
DE2909151A1
(en)
1979-09-13
IT7867499D0
(en)
1978-03-09
NL7901871A
(en)
1979-09-11
IT1108375B
(en)
1985-12-09
BE874402A
(en)
1979-06-18
CA1114513A
(en)
1981-12-15
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Legal Events
Date
Code
Title
Description
1985-11-06
PCNP
Patent ceased through non-payment of renewal fee
